forked from rusefi/hw_microRusEfi
-
Notifications
You must be signed in to change notification settings - Fork 0
/
microRusEfi.pro
366 lines (366 loc) · 5.82 KB
/
microRusEfi.pro
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
update=12/21/2019 8:46:56 PM
version=1
last_client=kicad
[general]
version=1
RootSch=
BoardNm=
[cvpcb]
version=1
NetIExt=net
[eeschema]
version=1
LibDir=
[eeschema/libraries]
[pcbnew]
version=1
PageLayoutDescrFile=rusefi_lib_external/Border.kicad_wks
LastNetListRead=microRusEfi.net
CopperLayerCount=2
BoardThickness=1.6
AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=1
MinTrackWidth=0.2032
MinViaDiameter=0.2
MinViaDrill=0.3
MinMicroViaDiameter=0.508
MinMicroViaDrill=0.127
MinHoleToHole=0.25
TrackWidth1=0.2032
TrackWidth2=0.2032
TrackWidth3=0.2159
TrackWidth4=0.2159
TrackWidth5=0.3048
TrackWidth6=0.4064
TrackWidth7=0.55
TrackWidth8=0.6
TrackWidth9=1.0668
TrackWidth10=1.651
TrackWidth11=1.6764
TrackWidth12=2.7178
ViaDiameter1=0.6
ViaDrill1=0.3
ViaDiameter2=0.6
ViaDrill2=0.3
ViaDiameter3=0.78994
ViaDrill3=0.43434
ViaDiameter4=1
ViaDrill4=0.5
ViaDiameter5=1.54178
ViaDrill5=1.18618
dPairWidth1=0.2032
dPairGap1=0.25
dPairViaGap1=0.25
SilkLineWidth=0.25
SilkTextSizeV=0.75
SilkTextSizeH=0.75
SilkTextSizeThickness=0.13
SilkTextItalic=0
SilkTextUpright=1
CopperLineWidth=0.2
CopperTextSizeV=1.5
CopperTextSizeH=1.5
CopperTextThickness=0.3
CopperTextItalic=0
CopperTextUpright=1
EdgeCutLineWidth=0.2
CourtyardLineWidth=0.05
OthersLineWidth=0.15
OthersTextSizeV=1
OthersTextSizeH=1
OthersTextSizeThickness=0.15
OthersTextItalic=0
OthersTextUpright=1
SolderMaskClearance=7.599999999999999e-05
SolderMaskMinWidth=0
SolderPasteClearance=0
SolderPasteRatio=-0
[pcbnew/Layer.F.Cu]
Name=F.Cu
Type=0
Enabled=1
[pcbnew/Layer.In1.Cu]
Name=In1.Cu
Type=0
Enabled=0
[pcbnew/Layer.In2.Cu]
Name=In2.Cu
Type=0
Enabled=0
[pcbnew/Layer.In3.Cu]
Name=In3.Cu
Type=0
Enabled=0
[pcbnew/Layer.In4.Cu]
Name=In4.Cu
Type=0
Enabled=0
[pcbnew/Layer.In5.Cu]
Name=In5.Cu
Type=0
Enabled=0
[pcbnew/Layer.In6.Cu]
Name=In6.Cu
Type=0
Enabled=0
[pcbnew/Layer.In7.Cu]
Name=In7.Cu
Type=0
Enabled=0
[pcbnew/Layer.In8.Cu]
Name=In8.Cu
Type=0
Enabled=0
[pcbnew/Layer.In9.Cu]
Name=In9.Cu
Type=0
Enabled=0
[pcbnew/Layer.In10.Cu]
Name=In10.Cu
Type=0
Enabled=0
[pcbnew/Layer.In11.Cu]
Name=In11.Cu
Type=0
Enabled=0
[pcbnew/Layer.In12.Cu]
Name=In12.Cu
Type=0
Enabled=0
[pcbnew/Layer.In13.Cu]
Name=In13.Cu
Type=0
Enabled=0
[pcbnew/Layer.In14.Cu]
Name=In14.Cu
Type=0
Enabled=0
[pcbnew/Layer.In15.Cu]
Name=In15.Cu
Type=0
Enabled=0
[pcbnew/Layer.In16.Cu]
Name=In16.Cu
Type=0
Enabled=0
[pcbnew/Layer.In17.Cu]
Name=In17.Cu
Type=0
Enabled=0
[pcbnew/Layer.In18.Cu]
Name=In18.Cu
Type=0
Enabled=0
[pcbnew/Layer.In19.Cu]
Name=In19.Cu
Type=0
Enabled=0
[pcbnew/Layer.In20.Cu]
Name=In20.Cu
Type=0
Enabled=0
[pcbnew/Layer.In21.Cu]
Name=In21.Cu
Type=0
Enabled=0
[pcbnew/Layer.In22.Cu]
Name=In22.Cu
Type=0
Enabled=0
[pcbnew/Layer.In23.Cu]
Name=In23.Cu
Type=0
Enabled=0
[pcbnew/Layer.In24.Cu]
Name=In24.Cu
Type=0
Enabled=0
[pcbnew/Layer.In25.Cu]
Name=In25.Cu
Type=0
Enabled=0
[pcbnew/Layer.In26.Cu]
Name=In26.Cu
Type=0
Enabled=0
[pcbnew/Layer.In27.Cu]
Name=In27.Cu
Type=0
Enabled=0
[pcbnew/Layer.In28.Cu]
Name=In28.Cu
Type=0
Enabled=0
[pcbnew/Layer.In29.Cu]
Name=In29.Cu
Type=0
Enabled=0
[pcbnew/Layer.In30.Cu]
Name=In30.Cu
Type=0
Enabled=0
[pcbnew/Layer.B.Cu]
Name=B.Cu
Type=0
Enabled=1
[pcbnew/Layer.B.Adhes]
Enabled=1
[pcbnew/Layer.F.Adhes]
Enabled=1
[pcbnew/Layer.B.Paste]
Enabled=1
[pcbnew/Layer.F.Paste]
Enabled=1
[pcbnew/Layer.B.SilkS]
Enabled=1
[pcbnew/Layer.F.SilkS]
Enabled=1
[pcbnew/Layer.B.Mask]
Enabled=1
[pcbnew/Layer.F.Mask]
Enabled=1
[pcbnew/Layer.Dwgs.User]
Enabled=1
[pcbnew/Layer.Cmts.User]
Enabled=1
[pcbnew/Layer.Eco1.User]
Enabled=1
[pcbnew/Layer.Eco2.User]
Enabled=1
[pcbnew/Layer.Edge.Cuts]
Enabled=1
[pcbnew/Layer.Margin]
Enabled=1
[pcbnew/Layer.B.CrtYd]
Enabled=1
[pcbnew/Layer.F.CrtYd]
Enabled=1
[pcbnew/Layer.B.Fab]
Enabled=1
[pcbnew/Layer.F.Fab]
Enabled=1
[pcbnew/Layer.Rescue]
Enabled=0
[pcbnew/Netclasses]
[pcbnew/Netclasses/Default]
Name=Default
Clearance=0.1524
TrackWidth=0.2032
ViaDiameter=0.6
ViaDrill=0.3
uViaDiameter=0.508
uViaDrill=0.127
dPairWidth=0.2032
dPairGap=0.25
dPairViaGap=0.25
[pcbnew/Netclasses/1]
Name=1A EXTERNAL
Clearance=0.1905
TrackWidth=0.3048
ViaDiameter=0.6858
ViaDrill=0.3302
uViaDiameter=0.508
uViaDrill=0.127
dPairWidth=0.2032
dPairGap=0.25
dPairViaGap=0.25
[pcbnew/Netclasses/2]
Name=2.5A EXTERNAL
Clearance=0.1905
TrackWidth=1.0668
ViaDiameter=0.6858
ViaDrill=0.3302
uViaDiameter=0.508
uViaDrill=0.127
dPairWidth=0.2032
dPairGap=0.25
dPairViaGap=0.25
[pcbnew/Netclasses/3]
Name=3,5A EXT HIGH VOLTAGE
Clearance=1.016
TrackWidth=1.6764
ViaDiameter=0.6858
ViaDrill=0.3302
uViaDiameter=0.508
uViaDrill=0.127
dPairWidth=0.2032
dPairGap=0.25
dPairViaGap=0.25
[pcbnew/Netclasses/4]
Name=3.5A EXTERNAL
Clearance=0.1905
TrackWidth=1.651
ViaDiameter=1.0922
ViaDrill=0.6858
uViaDiameter=0.508
uViaDrill=0.127
dPairWidth=0.2032
dPairGap=0.25
dPairViaGap=0.25
[pcbnew/Netclasses/5]
Name=5A EXTERNAL
Clearance=0.2159
TrackWidth=1.0668
ViaDiameter=1.54178
ViaDrill=1.18618
uViaDiameter=0.508
uViaDrill=0.127
dPairWidth=0.2032
dPairGap=0.25
dPairViaGap=0.25
[pcbnew/Netclasses/6]
Name=CUSTOM
Clearance=0.1524
TrackWidth=0.25
ViaDiameter=0.6
ViaDrill=0.3
uViaDiameter=0.508
uViaDrill=0.127
dPairWidth=0.2032
dPairGap=0.25
dPairViaGap=0.25
[pcbnew/Netclasses/7]
Name=CUSTOM 0.6
Clearance=0.1524
TrackWidth=0.6
ViaDiameter=1
ViaDrill=0.4
uViaDiameter=0.508
uViaDrill=0.127
dPairWidth=0.2032
dPairGap=0.25
dPairViaGap=0.25
[pcbnew/Netclasses/8]
Name=MIN_EXTERN_188A
Clearance=0.1524
TrackWidth=0.2032
ViaDiameter=0.6858
ViaDrill=0.3302
uViaDiameter=0.508
uViaDrill=0.127
dPairWidth=0.2032
dPairGap=0.25
dPairViaGap=0.25
[pcbnew/Netclasses/9]
Name=MIN_EXTERN_241A
Clearance=0.1524
TrackWidth=0.2159
ViaDiameter=0.6
ViaDrill=0.3
uViaDiameter=0.508
uViaDrill=0.127
dPairWidth=0.2032
dPairGap=0.25
dPairViaGap=0.25
[schematic_editor]
version=1
PageLayoutDescrFile=rusefi_lib_external/Border.kicad_wks
PlotDirectoryName=
SubpartIdSeparator=0
SubpartFirstId=65
NetFmtName=Pcbnew
SpiceAjustPassiveValues=0
LabSize=50
ERC_TestSimilarLabels=1