diff --git a/CHANGELOG b/CHANGELOG
index b48b7c2..2b16f9c 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -1,3 +1,4 @@
+2022-02-28: upversion to FW0210, new sample rate 128 kS/s (ID: 113) [f4755d2]
 2022-02-08: more tool programs in examples [6c9d2d7]
 2022-02-05: Merge branch 'main' of github.com:Ho-Ro/Hantek6022API fix last commit [078dffd]
 2022-02-05: fix github workflow [0966f8b]
diff --git a/PyHT6022/Firmware/DDS120/dds120-firmware.hex b/PyHT6022/Firmware/DDS120/dds120-firmware.hex
index 718a2aa..6e8cec1 100644
--- a/PyHT6022/Firmware/DDS120/dds120-firmware.hex
+++ b/PyHT6022/Firmware/DDS120/dds120-firmware.hex
@@ -39,8 +39,8 @@
 :2003E300E6E27401F08D828C838EF01216EE90E625F074012DFAE43CFB8E078A828B838F9B
 :20040300F01216EE90E624F02290E61274D8F090E614E4F090E6D204F08D828C838EF0121B
 :2004230016EE90E621F00DBD00010C8D828C838EF01216EEFF90E62074075FF08D828C8328
-:200443008EF01216EEC423541F90E64004F0020294AF827E00EE75F005A4FCADF024D7F535
-:2004630082ED341AF583E493FBB5070280080EBE17E375820022EC24D7FCED341AFD8C8284
+:200443008EF01216EEC423541F90E64004F0020294AF827E00EE75F005A4FCADF02417F5F5
+:2004630082ED341BF583E493FBB5070280080EBE19E375820022EC2417FCED341BFD8C8240
 :200483008D83A3A3A3A3E49390E601F08C828D83A3E493FDA3E493FEA3E493FF75AF0775D9
 :2004A3009DE4759E007C208C031CEB60168D828E838FF01216EEFBA3AD82AE8390E67CEB6D
 :2004C300F080E47F608F061FEE600790E67CE4F080F375820122E582FF70087B64FCFDFED6
@@ -97,30 +97,32 @@
 :2017F7000F0E000000000000020001000000000050555500000000000000000000000000B8
 :201817000101000000000000020001000000000050555500000000000000000000000000B2
 :20183700FAFAFAFAFAF9000002000000000001005055555555555500000000000000000065
-:20185700FAFAF9000000000002000001000000005055555500000000000000000000000032
-:20187700C8C8C70000000000020000010000000050555555000000000000000000000000A8
-:20189700FAFAF90000000000020000010000000050555555000000000000000000000000F2
-:2018B7009695000000000000020001000000000050555500000000000000000000000000E9
-:2018D700BBBB0000000000000200010000000000505555000000000000000000000000007E
-:2018F7000201000000000000020001000000000050555500000000000000000000000000D1
-:201917004B4A0000000000000200010000000000505555000000000000000000000000001E
-:20193700252500000000000002000100000000005055550000000000000000000000000049
-:201957000100000000000000020100000000000050550000000000000000000000000000C7
-:201977001E1D00000000000002000100000000005055550000000000000000000000000018
-:20199700010100000000000002000100000000005055550000000000000000000000000031
-:2019B700070700000000000002000100000000005055550000000000000000000000000005
-:2019D700010000000000000002010000000000005055000000000000000000000000000047
-:2019F7000504000000000000020001000000000050555500000000000000000000000000CA
-:201A170080000000000000000300000000000000000000000000000000000000000000002C
-:201A3700060500000000000002000100000000005055550000000000000000000000000087
+:20185700FAFAFAFAFAF9000002000000000001005055555555555500000000000000000045
+:20187700FAFAF9000000000002000001000000005055555500000000000000000000000012
+:20189700C8C8C7000000000002000001000000005055555500000000000000000000000088
+:2018B700FAFAF90000000000020000010000000050555555000000000000000000000000D2
+:2018D7009695000000000000020001000000000050555500000000000000000000000000C9
+:2018F700BBBB0000000000000200010000000000505555000000000000000000000000005E
+:201917000201000000000000020001000000000050555500000000000000000000000000B0
+:201937004B4A000000000000020001000000000050555500000000000000000000000000FE
+:20195700252500000000000002000100000000005055550000000000000000000000000029
+:201977000100000000000000020100000000000050550000000000000000000000000000A7
+:201997001E1D000000000000020001000000000050555500000000000000000000000000F8
+:2019B700010100000000000002000100000000005055550000000000000000000000000011
+:2019D7002525000000000000020001000000000050555500000000000000000000000000A9
+:2019F7000707000000000000020001000000000050555500000000000000000000000000C5
+:201A1700010000000000000002010000000000005055000000000000000000000000000006
+:201A3700050400000000000002000100000000005055550000000000000000000000000089
 :201A57008000000000000000030000000000000000000000000000000000000000000000EC
-:201A770003020000000000000200010000000000505555000000000000000000000000004D
-:201A970002020000000000000200010000000000505555000000000000000000000000002E
+:201A7700060500000000000002000100000000005055550000000000000000000000000047
+:201A97008000000000000000030000000000000000000000000000000000000000000000AC
 :201AB70003020000000000000200010000000000505555000000000000000000000000000D
-:201AD70030571A80EA1E171A80AA18D71980CA10971980CA0F5719808A0CF71880CA0A1700
-:201AF70018808A08B71A80CA06971A808A05771A808A04371A80CA03F719808A02B719801B
-:201B17008A01F717808A967719808A8C3719808A781719808A71D71880CA6EB718808A6AE8
-:131B3700971880CA697718808A685718808A663718808A00
+:201AD7000202000000000000020001000000000050555500000000000000000000000000EE
+:201AF7000302000000000000020001000000000050555500000000000000000000000000CD
+:201B170030971A80EA1E571A80AA18171A80CA10B71980CA0F7719808A0C171980CA0A179D
+:201B370018808A08F71A80CA06D71A808A05B71A808A04771A80CA03371A808A02F7198059
+:201B57008A01F717808AA4D719808A969719808A8C5719808A783719808A71F71880CA6ECD
+:1D1B7700D718808A6AB71880CA699718808A687718808A67571880CA663718808AD3
 :203D000012010002FFFFFF40B50420011002010203010A0600020000004001000902890077
 :203D200001010080FA0904000001FF000000070586020002000904000101FF000100070549
 :203D400082010014010904000201FF00010007058201000C010904000301FF000100070502
@@ -211,7 +213,7 @@
 :201413000490E6B3ECF090E6B4EDF02290E6A0E0FF43070190E6A0EFF0227E127F3D90E66E
 :20143300B3EFF090E6B47412F02290E6B3E517F090E6B4E516F02290E6A0E0FF4307019029
 :05145300E6A0EFF0220D
-:200066007900E94400601B7A00901B4A780175923CE493F2A308B800020592D9F4DAF275BB
+:200066007900E94400601B7A00901B94780175923CE493F2A308B800020592D9F4DAF27571
 :0200860092FFE7
 :12145800AA82AB83A2F73392D1F5826002D2F7ACF02299
 :1B146A0020F71130F6138883A88220F509F6A8837583002280FEF280F5F02281
diff --git a/PyHT6022/Firmware/DSO6021/dso6021-firmware.hex b/PyHT6022/Firmware/DSO6021/dso6021-firmware.hex
index b0b3c7a..1d513a5 100644
--- a/PyHT6022/Firmware/DSO6021/dso6021-firmware.hex
+++ b/PyHT6022/Firmware/DSO6021/dso6021-firmware.hex
@@ -36,8 +36,8 @@
 :20038300FB8E078A828B838FF012166F90E624F02290E61274D8F090E614E4F090E6D20480
 :2003A300F08D828C838EF012166F90E621F00DBD00010C8D828C838EF012166FFF90E620F1
 :2003C30074075FF08D828C838EF012166FC423541F90E64004F002021EAF827E00EE75F0F5
-:2003E30005A4FCADF02458F582ED341AF583E493FBB5070280080EBE17E375820022EC246B
-:2004030058FCED341AFD8C828D83A3A3A3A3E49390E601F08C828D83A3E493FDA3E493FE78
+:2003E30005A4FCADF02498F582ED341AF583E493FBB5070280080EBE19E375820022EC2429
+:2004030098FCED341AFD8C828D83A3A3A3A3E49390E601F08C828D83A3E493FDA3E493FE38
 :20042300A3E493FF75AF07759DE4759E007C208C031CEB60168D828E838FF012166FFBA3F0
 :20044300AD82AE8390E67CEBF080E47F608F061FEE600790E67CE4F080F375820122E58266
 :20046300FF70087B64FCFDFE0204EEEF249B401D8F4C754D00754E00754F009003E8E4F5B5
@@ -93,30 +93,32 @@
 :201778000F0E00000000000002000100000000005055550000000000000000000000000037
 :20179800010100000000000002000100000000005055550000000000000000000000000032
 :2017B800FAFAFAFAFAF90000020000000000010050555555555555000000000000000000E5
-:2017D800FAFAF90000000000020000010000000050555555000000000000000000000000B2
-:2017F800C8C8C7000000000002000001000000005055555500000000000000000000000028
-:20181800FAFAF9000000000002000001000000005055555500000000000000000000000071
-:20183800969500000000000002000100000000005055550000000000000000000000000068
-:20185800BBBB000000000000020001000000000050555500000000000000000000000000FD
-:20187800020100000000000002000100000000005055550000000000000000000000000050
-:201898004B4A0000000000000200010000000000505555000000000000000000000000009E
-:2018B8002525000000000000020001000000000050555500000000000000000000000000C9
-:2018D800010000000000000002010000000000005055000000000000000000000000000047
-:2018F8001E1D00000000000002000100000000005055550000000000000000000000000098
-:201918000101000000000000020001000000000050555500000000000000000000000000B0
-:20193800070700000000000002000100000000005055550000000000000000000000000084
-:201958000100000000000000020100000000000050550000000000000000000000000000C6
-:20197800050400000000000002000100000000005055550000000000000000000000000049
-:201998008000000000000000030000000000000000000000000000000000000000000000AC
-:2019B800060500000000000002000100000000005055550000000000000000000000000007
+:2017D800FAFAFAFAFAF90000020000000000010050555555555555000000000000000000C5
+:2017F800FAFAF9000000000002000001000000005055555500000000000000000000000092
+:20181800C8C8C7000000000002000001000000005055555500000000000000000000000007
+:20183800FAFAF9000000000002000001000000005055555500000000000000000000000051
+:20185800969500000000000002000100000000005055550000000000000000000000000048
+:20187800BBBB000000000000020001000000000050555500000000000000000000000000DD
+:20189800020100000000000002000100000000005055550000000000000000000000000030
+:2018B8004B4A0000000000000200010000000000505555000000000000000000000000007E
+:2018D8002525000000000000020001000000000050555500000000000000000000000000A9
+:2018F800010000000000000002010000000000005055000000000000000000000000000027
+:201918001E1D00000000000002000100000000005055550000000000000000000000000077
+:20193800010100000000000002000100000000005055550000000000000000000000000090
+:20195800252500000000000002000100000000005055550000000000000000000000000028
+:20197800070700000000000002000100000000005055550000000000000000000000000044
+:20199800010000000000000002010000000000005055000000000000000000000000000086
+:2019B800050400000000000002000100000000005055550000000000000000000000000009
 :2019D80080000000000000000300000000000000000000000000000000000000000000006C
-:2019F8000302000000000000020001000000000050555500000000000000000000000000CD
-:201A18000202000000000000020001000000000050555500000000000000000000000000AD
+:2019F8000605000000000000020001000000000050555500000000000000000000000000C7
+:201A180080000000000000000300000000000000000000000000000000000000000000002B
 :201A380003020000000000000200010000000000505555000000000000000000000000008C
-:201A580030D81980EA1E981980AA18581980CA10181980CA0FD818808A0C781880CA0A98FB
-:201A780017808A08381A80CA06181A808A05F819808A04B81980CA037819808A0238198097
-:201A98008A017817808A96F818808A8CB818808A789818808A71581880CA6E3818808A6A65
-:131AB800181880CA69F817808A68D817808A66B817808A7F
+:201A580002020000000000000200010000000000505555000000000000000000000000006D
+:201A780003020000000000000200010000000000505555000000000000000000000000004C
+:201A980030181A80EA1ED81980AA18981980CA10381980CA0FF818808A0C981880CA0A989A
+:201AB80017808A08781A80CA06581A808A05381A808A04F81980CA03B819808A02781980D6
+:201AD8008A017817808AA45819808A961819808A8CD818808A78B818808A71781880CA6E49
+:1D1AF8005818808A6A381880CA691818808A68F817808A67D81780CA66B817808A50
 :203D000012010002FFFFFF40B50421601002010203010A0600020000004001000902890017
 :203D200001010080FA0904000001FF000000070586020002000904000101FF000100070549
 :203D400082010014010904000201FF00010007058201000C010904000301FF000100070502
@@ -207,7 +209,7 @@
 :201394000490E6B3ECF090E6B4EDF02290E6A0E0FF43070190E6A0EFF0227E127F3D90E6EE
 :2013B400B3EFF090E6B47412F02290E6B3E517F090E6B4E516F02290E6A0E0FF43070190A9
 :0513D400E6A0EFF0228D
-:200066007900E94400601B7A00901ACB780175923CE493F2A308B800020592D9F4DAF2753B
+:200066007900E94400601B7A00901B15780175923CE493F2A308B800020592D9F4DAF275F0
 :0200860092FFE7
 :1213D900AA82AB83A2F73392D1F5826002D2F7ACF02219
 :1B13EB0020F71130F6138883A88220F509F6A8837583002280FEF280F5F02201
diff --git a/PyHT6022/Firmware/DSO6022BE/dso6022be-firmware.hex b/PyHT6022/Firmware/DSO6022BE/dso6022be-firmware.hex
index 465f74d..657221f 100644
--- a/PyHT6022/Firmware/DSO6022BE/dso6022be-firmware.hex
+++ b/PyHT6022/Firmware/DSO6022BE/dso6022be-firmware.hex
@@ -37,8 +37,8 @@
 :2003A300F074012DFAE43CFB8E078A828B838FF01216A390E624F02290E61274D8F090E6B4
 :2003C30014E4F090E6D204F08D828C838EF01216A390E621F00DBD00010C8D828C838EF095
 :2003E3001216A3FF90E62074075FF08D828C838EF01216A3C423541F90E64004F00202451C
-:20040300AF827E00EE75F005A4FCADF0248CF582ED341AF583E493FBB5070280080EBE1720
-:20042300E375820022EC248CFCED341AFD8C828D83A3A3A3A3E49390E601F08C828D83A3A4
+:20040300AF827E00EE75F005A4FCADF024CCF582ED341AF583E493FBB5070280080EBE19DE
+:20042300E375820022EC24CCFCED341AFD8C828D83A3A3A3A3E49390E601F08C828D83A364
 :20044300E493FDA3E493FEA3E493FF75AF07759DE4759E007C208C031CEB60168D828E83F8
 :200463008FF01216A3FBA3AD82AE8390E67CEBF080E47F608F061FEE600790E67CE4F080D2
 :20048300F375820122E582FF70087B64FCFDFE020515EF249B401D8F4C754D00754E00759C
@@ -94,30 +94,32 @@
 :2017AC000F0E00000000000002000100000000005055550000000000000000000000000003
 :2017CC000101000000000000020001000000000050555500000000000000000000000000FE
 :2017EC00FAFAFAFAFAF90000020000000000010050555555555555000000000000000000B1
-:20180C00FAFAF900000000000200000100000000505555550000000000000000000000007D
-:20182C00C8C8C70000000000020000010000000050555555000000000000000000000000F3
-:20184C00FAFAF900000000000200000100000000505555550000000000000000000000003D
-:20186C00969500000000000002000100000000005055550000000000000000000000000034
-:20188C00BBBB000000000000020001000000000050555500000000000000000000000000C9
-:2018AC0002010000000000000200010000000000505555000000000000000000000000001C
-:2018CC004B4A0000000000000200010000000000505555000000000000000000000000006A
-:2018EC00252500000000000002000100000000005055550000000000000000000000000095
-:20190C00010000000000000002010000000000005055000000000000000000000000000012
-:20192C001E1D00000000000002000100000000005055550000000000000000000000000063
-:20194C0001010000000000000200010000000000505555000000000000000000000000007C
-:20196C00070700000000000002000100000000005055550000000000000000000000000050
-:20198C00010000000000000002010000000000005055000000000000000000000000000092
-:2019AC00050400000000000002000100000000005055550000000000000000000000000015
-:2019CC00800000000000000003000000000000000000000000000000000000000000000078
-:2019EC000605000000000000020001000000000050555500000000000000000000000000D3
+:20180C00FAFAFAFAFAF9000002000000000001005055555555555500000000000000000090
+:20182C00FAFAF900000000000200000100000000505555550000000000000000000000005D
+:20184C00C8C8C70000000000020000010000000050555555000000000000000000000000D3
+:20186C00FAFAF900000000000200000100000000505555550000000000000000000000001D
+:20188C00969500000000000002000100000000005055550000000000000000000000000014
+:2018AC00BBBB000000000000020001000000000050555500000000000000000000000000A9
+:2018CC000201000000000000020001000000000050555500000000000000000000000000FC
+:2018EC004B4A0000000000000200010000000000505555000000000000000000000000004A
+:20190C00252500000000000002000100000000005055550000000000000000000000000074
+:20192C000100000000000000020100000000000050550000000000000000000000000000F2
+:20194C001E1D00000000000002000100000000005055550000000000000000000000000043
+:20196C0001010000000000000200010000000000505555000000000000000000000000005C
+:20198C002525000000000000020001000000000050555500000000000000000000000000F4
+:2019AC00070700000000000002000100000000005055550000000000000000000000000010
+:2019CC00010000000000000002010000000000005055000000000000000000000000000052
+:2019EC000504000000000000020001000000000050555500000000000000000000000000D5
 :201A0C00800000000000000003000000000000000000000000000000000000000000000037
-:201A2C00030200000000000002000100000000005055550000000000000000000000000098
-:201A4C00020200000000000002000100000000005055550000000000000000000000000079
+:201A2C00060500000000000002000100000000005055550000000000000000000000000092
+:201A4C008000000000000000030000000000000000000000000000000000000000000000F7
 :201A6C00030200000000000002000100000000005055550000000000000000000000000058
-:201A8C00300C1A80EA1ECC1980AA188C1980CA104C1980CA0F0C19808A0CAC1880CA0ACC59
-:201AAC0017808A086C1A80CA064C1A808A052C1A808A04EC1980CA03AC19808A026C19802A
-:201ACC008A01AC17808A962C19808A8CEC18808A78CC18808A718C1880CA6E6C18808A6AF8
-:131AEC004C1880CA692C18808A680C18808A66EC17808A79
+:201A8C00020200000000000002000100000000005055550000000000000000000000000039
+:201AAC00030200000000000002000100000000005055550000000000000000000000000018
+:201ACC00304C1A80EA1E0C1A80AA18CC1980CA106C1980CA0F2C19808A0CCC1880CA0ACCF8
+:201AEC0017808A08AC1A80CA068C1A808A056C1A808A042C1A80CA03EC19808A02AC198069
+:201B0C008A01AC17808AA48C19808A964C19808A8C0C19808A78EC18808A71AC1880CA6EDB
+:1D1B2C008C18808A6A6C1880CA694C18808A682C18808A670C1880CA66EC17808AE1
 :203D000012010002FFFFFF40B50422601002010203010A0600020000004001000902890016
 :203D200001010080FA0904000001FF000000070586020002000904000101FF000100070549
 :203D400082010014010904000201FF00010007058201000C010904000301FF000100070502
@@ -208,7 +210,7 @@
 :2013C8000490E6B3ECF090E6B4EDF02290E6A0E0FF43070190E6A0EFF0227E127F3D90E6BA
 :2013E800B3EFF090E6B47412F02290E6B3E517F090E6B4E516F02290E6A0E0FF4307019075
 :05140800E6A0EFF02258
-:200066007900E94400601B7A00901AFF780175923CE493F2A308B800020592D9F4DAF27507
+:200066007900E94400601B7A00901B49780175923CE493F2A308B800020592D9F4DAF275BC
 :0200860092FFE7
 :12140D00AA82AB83A2F73392D1F5826002D2F7ACF022E4
 :1B141F0020F71130F6138883A88220F509F6A8837583002280FEF280F5F022CC
diff --git a/PyHT6022/Firmware/DSO6022BE/scope6022.inc b/PyHT6022/Firmware/DSO6022BE/scope6022.inc
index 32ed1a7..05cecde 100644
--- a/PyHT6022/Firmware/DSO6022BE/scope6022.inc
+++ b/PyHT6022/Firmware/DSO6022BE/scope6022.inc
@@ -215,6 +215,7 @@ static const struct samplerate_info samplerates[] = {
     {3, waveform_3, ifconfig_3},       //   3 MS/s
     {2, waveform_2, ifconfig_2},       //   2 MS/s
     {1, waveform_1, ifconfig_1},       //   1 MS/s
+    {164, waveform_164, ifconfig_164}, // 640 kS/s
     {150, waveform_150, ifconfig_150}, // 500 kS/s
     {140, waveform_140, ifconfig_140}, // 400 kS/s
     {120, waveform_120, ifconfig_120}, // 200 kS/s
@@ -223,6 +224,7 @@ static const struct samplerate_info samplerates[] = {
     {106, waveform_106, ifconfig_106}, //  64 kS/s
     {105, waveform_105, ifconfig_105}, //  50 kS/s
     {104, waveform_104, ifconfig_104}, //  40 kS/s
+    {103, waveform_103, ifconfig_103}, //  32 kS/s
     {102, waveform_102, ifconfig_102}, //  20 kS/s
 };
 
@@ -257,16 +259,18 @@ static BOOL set_samplerate( BYTE rate ) {
 
 // new functon to set the calibration pulse frequency that allows
 // to set all possible frequencies between 40 Hz and 100 kHz
+// integer dividers of 2MHz Hz will be exact
 // frequencies between 40 Hz and 1000 Hz can be multiples of 10 Hz
+// frequencies between 100 Hz to 10 kHz can be multiples of 100 Hz
 // frequencies between 1 kHz to 100 kHz can be multiples of 1 kHz
-// integer dividers of 2e6 Hz will be exact
 // calibration frequency is coded into one byte parameter freq:
 // freq == 0   -> 100 Hz (compatibility to old sigrok coding)
-// freq == 103 -> 32 Hz (lowest possible frequency due to 16bit HW timer2)
 // freq 1..100 -> freq in kHz
-// freq 101..200  -> (value-100)*10 is freq in Hz
+// freq 101, 102 -> not possible
+// freq == 103 -> 32 Hz (lowest possible frequency due to 16bit HW timer2)
+// freq 104..200  -> (value-100)*10 is freq in Hz
 // freq 201..255  -> (value-200)*100 is freq in Hz
-// e.g. 105 -> 50 Hz, 20 -> 20 kHz
+// e.g. 105 -> 50 Hz, 216 -> 1600 Hz, 20 -> 20 kHz
 //
 static BOOL set_calibration_pulse( BYTE freq ) {
     long frequency;
@@ -276,7 +280,7 @@ static BOOL set_calibration_pulse( BYTE freq ) {
         frequency = freq * 1000L;
     else if ( freq == 103 ) // special case for 32 Hz
         frequency = 32;
-    else if ( freq <= 200 ) // 101..200 -> 10, 20, 30 ... 1000 Hz
+    else if ( freq <= 200 ) // 101..200 -> (10, 20, 30,) 40 ... 1000 Hz
         frequency = ( freq - 100 ) * 10L;
     else // 201..255 -> 100, 200, 300 ... 5500 Hz
         frequency = ( freq - 200 ) * 100L;
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms.inc b/PyHT6022/Firmware/DSO6022BE/waveforms.inc
index 4f28745..c5819cb 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms.inc
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms.inc
@@ -1,6 +1,7 @@
 #define ifconfig_1 0x8a
 
-static const unsigned char waveform_1[ 32 ] = {
+static const unsigned char waveform_1[ 32 ] =
+{
 	0x0F,0x0E,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
@@ -9,7 +10,8 @@ static const unsigned char waveform_1[ 32 ] = {
 
 #define ifconfig_10 0x8a
 
-static const unsigned char waveform_10[ 32 ] = {
+static const unsigned char waveform_10[ 32 ] =
+{
 	0x01,0x01,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
@@ -18,7 +20,18 @@ static const unsigned char waveform_10[ 32 ] = {
 
 #define ifconfig_102 0x8a
 
-static const unsigned char waveform_102[ 32 ] = {
+static const unsigned char waveform_102[ 32 ] =
+{
+	0xFA,0xFA,0xFA,0xFA,0xFA,0xF9,0x00,0x00,
+	0x02,0x00,0x00,0x00,0x00,0x00,0x01,0x00,
+	0x50,0x55,0x55,0x55,0x55,0x55,0x55,0x00,
+	0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+};
+
+#define ifconfig_103 0xca
+
+static const unsigned char waveform_103[ 32 ] =
+{
 	0xFA,0xFA,0xFA,0xFA,0xFA,0xF9,0x00,0x00,
 	0x02,0x00,0x00,0x00,0x00,0x00,0x01,0x00,
 	0x50,0x55,0x55,0x55,0x55,0x55,0x55,0x00,
@@ -27,7 +40,8 @@ static const unsigned char waveform_102[ 32 ] = {
 
 #define ifconfig_104 0x8a
 
-static const unsigned char waveform_104[ 32 ] = {
+static const unsigned char waveform_104[ 32 ] =
+{
 	0xFA,0xFA,0xF9,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x00,0x01,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x55,0x00,0x00,0x00,0x00,
@@ -36,7 +50,8 @@ static const unsigned char waveform_104[ 32 ] = {
 
 #define ifconfig_105 0x8a
 
-static const unsigned char waveform_105[ 32 ] = {
+static const unsigned char waveform_105[ 32 ] =
+{
 	0xC8,0xC8,0xC7,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x00,0x01,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x55,0x00,0x00,0x00,0x00,
@@ -45,7 +60,8 @@ static const unsigned char waveform_105[ 32 ] = {
 
 #define ifconfig_106 0xca
 
-static const unsigned char waveform_106[ 32 ] = {
+static const unsigned char waveform_106[ 32 ] =
+{
 	0xFA,0xFA,0xF9,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x00,0x01,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x55,0x00,0x00,0x00,0x00,
@@ -54,7 +70,8 @@ static const unsigned char waveform_106[ 32 ] = {
 
 #define ifconfig_110 0x8a
 
-static const unsigned char waveform_110[ 32 ] = {
+static const unsigned char waveform_110[ 32 ] =
+{
 	0x96,0x95,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
@@ -63,7 +80,8 @@ static const unsigned char waveform_110[ 32 ] = {
 
 #define ifconfig_113 0xca
 
-static const unsigned char waveform_113[ 32 ] = {
+static const unsigned char waveform_113[ 32 ] =
+{
 	0xBB,0xBB,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
@@ -72,7 +90,8 @@ static const unsigned char waveform_113[ 32 ] = {
 
 #define ifconfig_12 0xca
 
-static const unsigned char waveform_12[ 32 ] = {
+static const unsigned char waveform_12[ 32 ] =
+{
 	0x02,0x01,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
@@ -81,7 +100,8 @@ static const unsigned char waveform_12[ 32 ] = {
 
 #define ifconfig_120 0x8a
 
-static const unsigned char waveform_120[ 32 ] = {
+static const unsigned char waveform_120[ 32 ] =
+{
 	0x4B,0x4A,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
@@ -90,7 +110,8 @@ static const unsigned char waveform_120[ 32 ] = {
 
 #define ifconfig_140 0x8a
 
-static const unsigned char waveform_140[ 32 ] = {
+static const unsigned char waveform_140[ 32 ] =
+{
 	0x25,0x25,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
@@ -99,7 +120,8 @@ static const unsigned char waveform_140[ 32 ] = {
 
 #define ifconfig_15 0x8a
 
-static const unsigned char waveform_15[ 32 ] = {
+static const unsigned char waveform_15[ 32 ] =
+{
 	0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x01,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x00,0x00,0x00,0x00,0x00,0x00,
@@ -108,7 +130,8 @@ static const unsigned char waveform_15[ 32 ] = {
 
 #define ifconfig_150 0x8a
 
-static const unsigned char waveform_150[ 32 ] = {
+static const unsigned char waveform_150[ 32 ] =
+{
 	0x1E,0x1D,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
@@ -117,16 +140,28 @@ static const unsigned char waveform_150[ 32 ] = {
 
 #define ifconfig_16 0xca
 
-static const unsigned char waveform_16[ 32 ] = {
+static const unsigned char waveform_16[ 32 ] =
+{
 	0x01,0x01,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
 	0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 };
 
+#define ifconfig_164 0x8a
+
+static const unsigned char waveform_164[ 32 ] =
+{
+	0x25,0x25,0x00,0x00,0x00,0x00,0x00,0x00,
+	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
+	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
+	0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+};
+
 #define ifconfig_2 0x8a
 
-static const unsigned char waveform_2[ 32 ] = {
+static const unsigned char waveform_2[ 32 ] =
+{
 	0x07,0x07,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
@@ -135,7 +170,8 @@ static const unsigned char waveform_2[ 32 ] = {
 
 #define ifconfig_24 0xca
 
-static const unsigned char waveform_24[ 32 ] = {
+static const unsigned char waveform_24[ 32 ] =
+{
 	0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x01,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x00,0x00,0x00,0x00,0x00,0x00,
@@ -144,7 +180,8 @@ static const unsigned char waveform_24[ 32 ] = {
 
 #define ifconfig_3 0x8a
 
-static const unsigned char waveform_3[ 32 ] = {
+static const unsigned char waveform_3[ 32 ] =
+{
 	0x05,0x04,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
@@ -153,7 +190,8 @@ static const unsigned char waveform_3[ 32 ] = {
 
 #define ifconfig_30 0xaa
 
-static const unsigned char waveform_30[ 32 ] = {
+static const unsigned char waveform_30[ 32 ] =
+{
 	0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
@@ -162,7 +200,8 @@ static const unsigned char waveform_30[ 32 ] = {
 
 #define ifconfig_4 0xca
 
-static const unsigned char waveform_4[ 32 ] = {
+static const unsigned char waveform_4[ 32 ] =
+{
 	0x06,0x05,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
@@ -171,7 +210,8 @@ static const unsigned char waveform_4[ 32 ] = {
 
 #define ifconfig_48 0xea
 
-static const unsigned char waveform_48[ 32 ] = {
+static const unsigned char waveform_48[ 32 ] =
+{
 	0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
@@ -180,7 +220,8 @@ static const unsigned char waveform_48[ 32 ] = {
 
 #define ifconfig_5 0x8a
 
-static const unsigned char waveform_5[ 32 ] = {
+static const unsigned char waveform_5[ 32 ] =
+{
 	0x03,0x02,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
@@ -189,7 +230,8 @@ static const unsigned char waveform_5[ 32 ] = {
 
 #define ifconfig_6 0x8a
 
-static const unsigned char waveform_6[ 32 ] = {
+static const unsigned char waveform_6[ 32 ] =
+{
 	0x02,0x02,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
@@ -198,7 +240,8 @@ static const unsigned char waveform_6[ 32 ] = {
 
 #define ifconfig_8 0xca
 
-static const unsigned char waveform_8[ 32 ] = {
+static const unsigned char waveform_8[ 32 ] =
+{
 	0x03,0x02,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_1.inc b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_1.inc
index 6eedc84..7591318 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_1.inc
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_1.inc
@@ -1,6 +1,7 @@
 #define ifconfig_1 0x8a
 
-static const unsigned char waveform_1[ 32 ] = {
+static const unsigned char waveform_1[ 32 ] =
+{
 	0x0F,0x0E,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_10.inc b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_10.inc
index e70a64b..db314c1 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_10.inc
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_10.inc
@@ -1,6 +1,7 @@
 #define ifconfig_10 0x8a
 
-static const unsigned char waveform_10[ 32 ] = {
+static const unsigned char waveform_10[ 32 ] =
+{
 	0x01,0x01,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_102.inc b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_102.inc
index 7b9e740..486b504 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_102.inc
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_102.inc
@@ -1,6 +1,7 @@
 #define ifconfig_102 0x8a
 
-static const unsigned char waveform_102[ 32 ] = {
+static const unsigned char waveform_102[ 32 ] =
+{
 	0xFA,0xFA,0xFA,0xFA,0xFA,0xF9,0x00,0x00,
 	0x02,0x00,0x00,0x00,0x00,0x00,0x01,0x00,
 	0x50,0x55,0x55,0x55,0x55,0x55,0x55,0x00,
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_102.wvf b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_102.wvf
index 65c7924..3891559 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_102.wvf
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_102.wvf
@@ -2,7 +2,7 @@
 ;
 ; Comment header
 ;
-	.WAVEFORM	102		; 20 kS/s
+	.WAVEFORM	102		; 20 kS/s (1500 cycles @ 30 MHz)
 
 	.TRICTL		1		; Assume TRICTL=1
 
@@ -10,7 +10,7 @@
 	.3048MHZ	0		; 30 MHz
 	.IFCLKOE	0		; IFCLK tri-state, CTL0 CTL2 drives the ADC
 
-	D	250			OE0 OE2		; 250 cycles, CTL0 CTL2 low
+	D	250			OE0 OE2			; 250 cycles, CTL0 CTL2 low
 	Z	250			CTL0 CTL2 OE0 OE2	; 250 cycles, CTL0 CTL2 high
 	Z	250			CTL0 CTL2 OE0 OE2	; 250 cycles, CTL0 CTL2 high
 	Z	250			CTL0 CTL2 OE0 OE2	; 250 cycles, CTL0 CTL2 high
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_103.inc b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_103.inc
new file mode 100644
index 0000000..fcc58d9
--- /dev/null
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_103.inc
@@ -0,0 +1,10 @@
+#define ifconfig_103 0xca
+
+static const unsigned char waveform_103[ 32 ] =
+{
+	0xFA,0xFA,0xFA,0xFA,0xFA,0xF9,0x00,0x00,
+	0x02,0x00,0x00,0x00,0x00,0x00,0x01,0x00,
+	0x50,0x55,0x55,0x55,0x55,0x55,0x55,0x00,
+	0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+};
+
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_103.wvf b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_103.wvf
new file mode 100644
index 0000000..7b7d04a
--- /dev/null
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_103.wvf
@@ -0,0 +1,21 @@
+; waveform source file for gpif_compiler
+;
+; Comment header
+;
+	.WAVEFORM	103		; 32 kS/s (1500 cycles @ 48 MHz)
+
+	.TRICTL		1		; Assume TRICTL=1
+
+	.IFCLKSRC	1		; feed internal 30/48 MHz to the GPIF
+	.3048MHZ	1		; 48 MHz
+	.IFCLKOE	0		; IFCLK tri-state, CTL0 CTL2 drives the ADC
+
+	D	250			OE0 OE2			; 250 cycles, CTL0 CTL2 low
+	Z	250			CTL0 CTL2 OE0 OE2	; 250 cycles, CTL0 CTL2 high
+	Z	250			CTL0 CTL2 OE0 OE2	; 250 cycles, CTL0 CTL2 high
+	Z	250			CTL0 CTL2 OE0 OE2	; 250 cycles, CTL0 CTL2 high
+	Z	250			CTL0 CTL2 OE0 OE2	; 250 cycles, CTL0 CTL2 high
+	Z	249			CTL0 CTL2 OE0 OE2	; 249 cycles, CTL0 CTL2 high
+	J	RDY0 AND RDY0 $0 $0	CTL0 CTL2 OE0 OE2	; 1 cycle, jp 0
+
+; End
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_104.inc b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_104.inc
index ea3a63d..3964c8a 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_104.inc
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_104.inc
@@ -1,6 +1,7 @@
 #define ifconfig_104 0x8a
 
-static const unsigned char waveform_104[ 32 ] = {
+static const unsigned char waveform_104[ 32 ] =
+{
 	0xFA,0xFA,0xF9,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x00,0x01,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x55,0x00,0x00,0x00,0x00,
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_105.inc b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_105.inc
index 8abce63..37b3ef4 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_105.inc
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_105.inc
@@ -1,6 +1,7 @@
 #define ifconfig_105 0x8a
 
-static const unsigned char waveform_105[ 32 ] = {
+static const unsigned char waveform_105[ 32 ] =
+{
 	0xC8,0xC8,0xC7,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x00,0x01,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x55,0x00,0x00,0x00,0x00,
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_105.wvf b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_105.wvf
index e2ef2c4..6e925d5 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_105.wvf
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_105.wvf
@@ -2,7 +2,7 @@
 ;
 ; Comment header
 ;
-	.WAVEFORM 	105		; 50 kS/s
+	.WAVEFORM 	105		; 50 kS/s (600 cycles @ 30 MHz)
 
 	.TRICTL		1		; Assume TRICTL=1
 
@@ -10,7 +10,7 @@
 	.3048MHZ	0		; 30 MHz
 	.IFCLKOE	0		; IFCLK tri-state, CTL0 CTL2 drives the ADC
 
-	D	200			OE0 OE2		; 200 cycles, CTL0 CTL2 low
+	D	200			OE0 OE2			; 200 cycles, CTL0 CTL2 low
 	Z	200			CTL0 CTL2 OE0 OE2	; 200 cycles, CTL0 CTL2 high
 	Z	199			CTL0 CTL2 OE0 OE2	; 199 cycles, CTL0 CTL2 high
 	J 	RDY0 AND RDY0 $0 $0	CTL0 CTL2 OE0 OE2	; 1 cycle, jp 0
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_106.inc b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_106.inc
index 677cce1..47ed780 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_106.inc
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_106.inc
@@ -1,6 +1,7 @@
 #define ifconfig_106 0xca
 
-static const unsigned char waveform_106[ 32 ] = {
+static const unsigned char waveform_106[ 32 ] =
+{
 	0xFA,0xFA,0xF9,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x00,0x01,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x55,0x00,0x00,0x00,0x00,
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_106.wvf b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_106.wvf
index ff9ff9b..b155626 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_106.wvf
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_106.wvf
@@ -2,7 +2,7 @@
 ;
 ; Comment header
 ;
-	.WAVEFORM 	106		; 64 kS/s = 48M / 750
+	.WAVEFORM 	106		; 64 kS/s (750 cycles @ 48MHz)
 
 	.TRICTL		1		; Assume TRICTL=1
 
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_110.inc b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_110.inc
index 884bc26..f5700ff 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_110.inc
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_110.inc
@@ -1,6 +1,7 @@
 #define ifconfig_110 0x8a
 
-static const unsigned char waveform_110[ 32 ] = {
+static const unsigned char waveform_110[ 32 ] =
+{
 	0x96,0x95,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_110.wvf b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_110.wvf
index fa27f6c..485d11a 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_110.wvf
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_110.wvf
@@ -2,7 +2,7 @@
 ;
 ; Comment header
 ;
-	.WAVEFORM 	110		; 100 kS/s
+	.WAVEFORM 	110		; 100 kS/s (300 cycles @ 30 MHz)
 
 	.TRICTL		1		; Assume TRICTL=1
 
@@ -10,7 +10,7 @@
 	.3048MHZ	0		; 30 MHz
 	.IFCLKOE	0		; IFCLK tri-state, CTL0 CTL2 drives the ADC
 
-	D	150			OE0 OE2		; 150 cycles, CTL0 CTL2 low
+	D	150			OE0 OE2			; 150 cycles, CTL0 CTL2 low
 	Z	149			CTL0 CTL2 OE0 OE2	; 149 cycles, CTL0 CTL2 high
 	J 	RDY0 AND RDY0 $0 $0	CTL0 CTL2 OE0 OE2	; 1 cycle, jp 0
 
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_113.inc b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_113.inc
index 7ed4c17..b530383 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_113.inc
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_113.inc
@@ -1,6 +1,7 @@
 #define ifconfig_113 0xca
 
-static const unsigned char waveform_113[ 32 ] = {
+static const unsigned char waveform_113[ 32 ] =
+{
 	0xBB,0xBB,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_113.wvf b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_113.wvf
index 72ed522..7f791fb 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_113.wvf
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_113.wvf
@@ -2,7 +2,7 @@
 ;
 ; Comment header
 ;
-	.WAVEFORM 	113		; 128 kS/s = 48M / 375
+	.WAVEFORM 	113		; 128 kS/s (375 cycles @ 48 MHz)
 
 	.TRICTL		1		; Assume TRICTL=1
 
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_12.inc b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_12.inc
index 290192d..9920a73 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_12.inc
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_12.inc
@@ -1,6 +1,7 @@
 #define ifconfig_12 0xca
 
-static const unsigned char waveform_12[ 32 ] = {
+static const unsigned char waveform_12[ 32 ] =
+{
 	0x02,0x01,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_12.wvf b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_12.wvf
index b5f2a50..6cdec40 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_12.wvf
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_12.wvf
@@ -2,7 +2,7 @@
 ;
 ; Comment header
 ;
-	.WAVEFORM	12		; 12 MS/s
+	.WAVEFORM	12		; 12 MS/s (4 cycles @ 48 MHz)
 
 	.TRICTL		1		; Assume TRICTL=1
 
@@ -10,7 +10,7 @@
 	.3048MHZ	1		; 48 MHz
 	.IFCLKOE	0		; IFCLK tri-state, CTL0 CTL2 drives the ADC
 
-	D	2			OE0 OE2		; 2 cycle, CTL0 CTL2 low
+	D	2			OE0 OE2			; 2 cycle, CTL0 CTL2 low
 	Z	1			CTL0 CTL2 OE0 OE2	; 1 cycle, CTL0 CTL2 high
 	J	RDY0 AND RDY0 $0 $0	CTL0 CTL2 OE0 OE2	; 1 cycle, CTL0 CTL2 high, jp 0
 
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_120.inc b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_120.inc
index ce2e9a6..f855045 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_120.inc
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_120.inc
@@ -1,6 +1,7 @@
 #define ifconfig_120 0x8a
 
-static const unsigned char waveform_120[ 32 ] = {
+static const unsigned char waveform_120[ 32 ] =
+{
 	0x4B,0x4A,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_120.wvf b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_120.wvf
index 0982324..09050d3 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_120.wvf
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_120.wvf
@@ -2,7 +2,7 @@
 ;
 ; Comment header
 ;
-	.WAVEFORM 	120		; 200 kS/s
+	.WAVEFORM 	120		; 200 kS/s (150 cycles @ 30 MHz)
 
 	.TRICTL		1		; Assume TRICTL=1
 
@@ -10,7 +10,7 @@
 	.3048MHZ	0		; 30 MHz
 	.IFCLKOE	0		; IFCLK tri-state, CTL0 CTL2 drives the ADC
 
-	D	75			OE0 OE2		; 75 cycles, CTL0 CTL2 low
+	D	75			OE0 OE2			; 75 cycles, CTL0 CTL2 low
 	Z	74			CTL0 CTL2 OE0 OE2	; 74 cycles, CTL0 CTL2 high
 	J 	RDY0 AND RDY0 $0 $0	CTL0 CTL2 OE0 OE2	; 1 cycle, jp 0
 
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_140.inc b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_140.inc
index 754a6bc..f5e4b56 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_140.inc
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_140.inc
@@ -1,6 +1,7 @@
 #define ifconfig_140 0x8a
 
-static const unsigned char waveform_140[ 32 ] = {
+static const unsigned char waveform_140[ 32 ] =
+{
 	0x25,0x25,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_140.wvf b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_140.wvf
index b87ed27..146ab64 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_140.wvf
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_140.wvf
@@ -10,7 +10,7 @@
 	.3048MHZ	0		; 30 MHz
 	.IFCLKOE	0		; IFCLK tri-state, CTL0 CTL2 drives the ADC
 
-	D	37			OE0 OE2		; 37 cycles, CTL0 CTL2 low
+	D	37			OE0 OE2			; 37 cycles, CTL0 CTL2 low
 	Z	37			CTL0 CTL2 OE0 OE2	; 37 cycles, CTL0 CTL2 high
 	J 	RDY0 AND RDY0 $0 $0	CTL0 CTL2 OE0 OE2	; 1 cycle, jp 0
 
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_15.inc b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_15.inc
index 477e30a..4e3e996 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_15.inc
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_15.inc
@@ -1,6 +1,7 @@
 #define ifconfig_15 0x8a
 
-static const unsigned char waveform_15[ 32 ] = {
+static const unsigned char waveform_15[ 32 ] =
+{
 	0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x01,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x00,0x00,0x00,0x00,0x00,0x00,
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_15.wvf b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_15.wvf
index 1412f0d..c6a99e7 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_15.wvf
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_15.wvf
@@ -2,7 +2,7 @@
 ;
 ; Comment header
 ;
-	.WAVEFORM	15		; 15 MS/s
+	.WAVEFORM	15		; 15 MS/s (2 cycles @ 30 MHz)
 
 	.TRICTL		1		; Assume TRICTL=1
 
@@ -10,7 +10,7 @@
 	.3048MHZ	0		; 30 MHz
 	.IFCLKOE	0		; IFCLK tri-state, CTL0 CTL2 drives the ADC
 
-	D	1			OE0 OE2		; 1 cycles, CTL0 CTL2 low
+	D	1			OE0 OE2			; 1 cycle, CTL0 CTL2 low
 	J 	RDY0 AND RDY0 $0 $0	CTL0 CTL2 OE0 OE2	; 1 cycle, jp 0
 
 ; End
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_150.inc b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_150.inc
index b6d824b..f7a1303 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_150.inc
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_150.inc
@@ -1,6 +1,7 @@
 #define ifconfig_150 0x8a
 
-static const unsigned char waveform_150[ 32 ] = {
+static const unsigned char waveform_150[ 32 ] =
+{
 	0x1E,0x1D,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_150.wvf b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_150.wvf
index 0c9aa2e..c4862d1 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_150.wvf
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_150.wvf
@@ -2,7 +2,7 @@
 ;
 ; Comment header
 ;
-	.WAVEFORM 	150		; 50 kS/s
+	.WAVEFORM 	150		; 500 kS/s (60 cycles @ 30 MHz)
 
 	.TRICTL		1		; Assume TRICTL=1
 
@@ -10,7 +10,7 @@
 	.3048MHZ	0		; 30 MHz
 	.IFCLKOE	0		; IFCLK tri-state, CTL0 CTL2 drives the ADC
 
-	D	30			OE0 OE2		; 30 cycles, CTL0 CTL2 low
+	D	30			OE0 OE2			; 30 cycles, CTL0 CTL2 low
 	Z	29			CTL0 CTL2 OE0 OE2	; 29 cycles, CTL0 CTL2 high
 	J 	RDY0 AND RDY0 $0 $0	CTL0 CTL2 OE0 OE2	; 1 cycle, jp 0
 
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_16.inc b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_16.inc
index 484595d..8045534 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_16.inc
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_16.inc
@@ -1,6 +1,7 @@
 #define ifconfig_16 0xca
 
-static const unsigned char waveform_16[ 32 ] = {
+static const unsigned char waveform_16[ 32 ] =
+{
 	0x01,0x01,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_16.wvf b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_16.wvf
index d50c827..60f2b8f 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_16.wvf
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_16.wvf
@@ -2,7 +2,7 @@
 ;
 ; Comment header
 ;
-	.WAVEFORM 	16		; 16 MS/s
+	.WAVEFORM 	16		; 16 MS/s (3 cycles @ 48 MHz)
 
 	.TRICTL		1		; Assume TRICTL=1
 
@@ -10,7 +10,7 @@
 	.3048MHZ	1		; 48 MHz
 	.IFCLKOE	0		; IFCLK tri-state, CTL0 CTL2 drives the ADC
 
-	D	1			OE0 OE2		; 1 cycle, CTL0 CTL2 low
+	D	1			OE0 OE2			; 1 cycle, CTL0 CTL2 low
 	Z	1			CTL0 CTL2 OE0 OE2	; 1 cycle, CTL0 CTL2 high
 	J 	RDY0 AND RDY0 $0 $0	CTL0 CTL2 OE0 OE2	; 1 cycle, CTL0 CTL2 high, jp 0
 
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_164.inc b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_164.inc
new file mode 100644
index 0000000..ae2e31b
--- /dev/null
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_164.inc
@@ -0,0 +1,10 @@
+#define ifconfig_164 0x8a
+
+static const unsigned char waveform_164[ 32 ] =
+{
+	0x25,0x25,0x00,0x00,0x00,0x00,0x00,0x00,
+	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
+	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
+	0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+};
+
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_164.wvf b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_164.wvf
new file mode 100644
index 0000000..b452c3d
--- /dev/null
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_164.wvf
@@ -0,0 +1,17 @@
+; waveform source file for gpif_compiler
+;
+; Comment header
+;
+	.WAVEFORM 	164		; 640 kS/s (75 cycles @ 48 MHz)
+
+	.TRICTL		1		; Assume TRICTL=1
+
+	.IFCLKSRC	1		; feed internal 30/48 MHz to the GPIF
+	.3048MHZ	0		; 48 MHz
+	.IFCLKOE	0		; IFCLK tri-state, CTL0 CTL2 drives the ADC
+
+	D	37			OE0 OE2			; 37 cycles, CTL0 CTL2 low
+	Z	37			CTL0 CTL2 OE0 OE2	; 37 cycles, CTL0 CTL2 high
+	J 	RDY0 AND RDY0 $0 $0	CTL0 CTL2 OE0 OE2	; 1 cycle, jp 0
+
+; End
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_2.inc b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_2.inc
index 60f656a..e197c76 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_2.inc
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_2.inc
@@ -1,6 +1,7 @@
 #define ifconfig_2 0x8a
 
-static const unsigned char waveform_2[ 32 ] = {
+static const unsigned char waveform_2[ 32 ] =
+{
 	0x07,0x07,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_2.wvf b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_2.wvf
index 15b8f1d..2a90326 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_2.wvf
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_2.wvf
@@ -2,7 +2,7 @@
 ;
 ; Comment header
 ;
-	.WAVEFORM	2		; 2 MS/s
+	.WAVEFORM	2		; 2 MS/s (15 cycles @ 30 MHz)
 
 	.TRICTL		1		; Assume TRICTL=1
 
@@ -10,7 +10,7 @@
 	.3048MHZ	0		; 30 MHz
 	.IFCLKOE	0		; IFCLK tri-state, CTL0 CTL2 drives the ADC
 
-	D	7			OE0 OE2		; 7 cycles, CTL0 CTL2 low
+	D	7			OE0 OE2			; 7 cycles, CTL0 CTL2 low
 	Z	7			CTL0 CTL2 OE0 OE2	; 7 cycles, CTL0 CTL2 high
 	J	RDY0 AND RDY0 $0 $0	CTL0 CTL2 OE0 OE2	; 1 cycle, jp 0
 
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_24.inc b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_24.inc
index 1df6b99..8bbcc33 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_24.inc
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_24.inc
@@ -1,6 +1,7 @@
 #define ifconfig_24 0xca
 
-static const unsigned char waveform_24[ 32 ] = {
+static const unsigned char waveform_24[ 32 ] =
+{
 	0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x01,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x00,0x00,0x00,0x00,0x00,0x00,
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_24.wvf b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_24.wvf
index 7dc42e1..4ef339c 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_24.wvf
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_24.wvf
@@ -2,7 +2,7 @@
 ;
 ; Comment header
 ;
-	.WAVEFORM	24		; 24 MS/s
+	.WAVEFORM	24		; 24 MS/s (2 cycles @ 48 MHz)
 
 	.TRICTL		1		; Assume TRICTL=1
 
@@ -10,7 +10,7 @@
 	.3048MHZ	1		; 48 MHz
 	.IFCLKOE	0		; IFCLK tri-state, CTL0 CTL2 drives the ADC
 
-	D	1			OE0 OE2		; 1 cycles, CTL0 CTL2 low
+	D	1			OE0 OE2			; 1 cycle, CTL0 CTL2 low
 	J 	RDY0 AND RDY0 $0 $0	CTL0 CTL2 OE0 OE2	; 1 cycle, jp 0
 
 ; End
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_3.inc b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_3.inc
index b2aab99..76ce8c3 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_3.inc
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_3.inc
@@ -1,6 +1,7 @@
 #define ifconfig_3 0x8a
 
-static const unsigned char waveform_3[ 32 ] = {
+static const unsigned char waveform_3[ 32 ] =
+{
 	0x05,0x04,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_3.wvf b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_3.wvf
index 20d3a63..99ae047 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_3.wvf
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_3.wvf
@@ -2,7 +2,7 @@
 ;
 ; Comment header
 ;
-	.WAVEFORM	3		; 3 MS/s
+	.WAVEFORM	3		; 3 MS/s (10 cycles @ 30 MHz)
 
 	.TRICTL		1		; Assume TRICTL=1
 
@@ -10,8 +10,8 @@
 	.3048MHZ	0		; 30 MHz
 	.IFCLKOE	0		; IFCLK tri-state, CTL0 CTL2 drives the ADC
 
-	D	5			OE0 OE2		; 5 cycle, CTL0 CTL2 low
-	Z	4			CTL0 CTL2 OE0 OE2	; 4 cycle, CTL0 CTL2 high
+	D	5			OE0 OE2			; 5 cycles, CTL0 CTL2 low
+	Z	4			CTL0 CTL2 OE0 OE2	; 4 cycles, CTL0 CTL2 high
 	J	RDY0 AND RDY0 $0 $0	CTL0 CTL2 OE0 OE2	; 1 cycle, CTL0 CTL2 high, jp 0
 
 ; End
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_30.inc b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_30.inc
index 53c6b82..9b87d6c 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_30.inc
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_30.inc
@@ -1,6 +1,7 @@
 #define ifconfig_30 0xaa
 
-static const unsigned char waveform_30[ 32 ] = {
+static const unsigned char waveform_30[ 32 ] =
+{
 	0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_30.wvf b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_30.wvf
index 85c76e5..8608e83 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_30.wvf
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_30.wvf
@@ -2,7 +2,7 @@
 ;
 ; Comment header
 ;
-	.WAVEFORM	30		; 30 MS/s
+	.WAVEFORM	30		; 30 MS/s (1 cycle @ 30 MHz)
 
 	.TRICTL		1		; Assume TRICTL=1
 
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_4.inc b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_4.inc
index ed2d8c7..8632d18 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_4.inc
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_4.inc
@@ -1,6 +1,7 @@
 #define ifconfig_4 0xca
 
-static const unsigned char waveform_4[ 32 ] = {
+static const unsigned char waveform_4[ 32 ] =
+{
 	0x06,0x05,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_4.wvf b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_4.wvf
index cd58c8a..f24ecb6 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_4.wvf
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_4.wvf
@@ -2,7 +2,7 @@
 ;
 ; Comment header
 ;
-	.WAVEFORM	4		; 4 MS/s
+	.WAVEFORM	4		; 4 MS/s (12 cycles @ 48 MHz)
 
 	.TRICTL		1		; Assume TRICTL=1
 
@@ -10,8 +10,8 @@
 	.3048MHZ	1		; 48 MHz
 	.IFCLKOE	0		; IFCLK tri-state, CTL0 CTL2 drives the ADC
 
-	D	6			OE0 OE2		; 6 cycle, CTL0 CTL2 low
-	Z	5			CTL0 CTL2 OE0 OE2	; 5 cycle, CTL0 CTL2 high
+	D	6			OE0 OE2			; 6 cycles, CTL0 CTL2 low
+	Z	5			CTL0 CTL2 OE0 OE2	; 5 cycles, CTL0 CTL2 high
 	J	RDY0 AND RDY0 $0 $0	CTL0 CTL2 OE0 OE2	; 1 cycle, CTL0 CTL2 high, jp 0
 
 ; End
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_48.inc b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_48.inc
index 40c0ef6..cb7668f 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_48.inc
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_48.inc
@@ -1,6 +1,7 @@
 #define ifconfig_48 0xea
 
-static const unsigned char waveform_48[ 32 ] = {
+static const unsigned char waveform_48[ 32 ] =
+{
 	0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_48.wvf b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_48.wvf
index d848e37..ed84484 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_48.wvf
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_48.wvf
@@ -2,12 +2,12 @@
 ;
 ; Comment header
 ;
-	.WAVEFORM	48		; 48 MS/s
+	.WAVEFORM	48		; 48 MS/s (1 cycle @ 48 MHz)
 
 	.TRICTL		1		; Assume TRICTL=1
 
 	.IFCLKSRC	1		; internal 30/48 MHz to GPIF
-	.3048MHZ	1		; 30 MHz
+	.3048MHZ	1		; 48 MHz
 	.IFCLKOE	1		; IFCLK output active to ADC
 
 	JD*	RDY0 AND RDY0 $0 $0			; 1 cycle, jp 0
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_5.inc b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_5.inc
index db86b8c..9253593 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_5.inc
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_5.inc
@@ -1,6 +1,7 @@
 #define ifconfig_5 0x8a
 
-static const unsigned char waveform_5[ 32 ] = {
+static const unsigned char waveform_5[ 32 ] =
+{
 	0x03,0x02,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_5.wvf b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_5.wvf
index 5a8cc45..e0e8051 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_5.wvf
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_5.wvf
@@ -2,7 +2,7 @@
 ;
 ; Comment header
 ;
-	.WAVEFORM 	5		; 5 MS/s
+	.WAVEFORM 	5		; 5 MS/s (6 cycles @ 30 MHz)
 
 	.TRICTL		1		; Assume TRICTL=1
 
@@ -10,8 +10,8 @@
 	.3048MHZ	0		; 30 MHz
 	.IFCLKOE	0		; IFCLK tri-state, CTL0 CTL2 drives the ADC
 
-	D	3			OE0 OE2		; 3 cycle, CTL0 CTL2 low
-	Z	2			CTL0 CTL2 OE0 OE2	; 2 cycle, CTL0 CTL2 high
+	D	3			OE0 OE2			; 3 cycles, CTL0 CTL2 low
+	Z	2			CTL0 CTL2 OE0 OE2	; 2 cycles, CTL0 CTL2 high
 	J 	RDY0 AND RDY0 $0 $0	CTL0 CTL2 OE0 OE2	; 1 cycle, CTL0 CTL2 high, jp 0
 
 ; End
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_6.inc b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_6.inc
index dec7a94..795d556 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_6.inc
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_6.inc
@@ -1,6 +1,7 @@
 #define ifconfig_6 0x8a
 
-static const unsigned char waveform_6[ 32 ] = {
+static const unsigned char waveform_6[ 32 ] =
+{
 	0x02,0x02,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_6.wvf b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_6.wvf
index c8bab2f..e34700d 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_6.wvf
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_6.wvf
@@ -2,7 +2,7 @@
 ;
 ; Comment header
 ;
-	.WAVEFORM	6		; 6 MS/s
+	.WAVEFORM	6		; 6 MS/s (5 cycles @ 30 MHz)
 
 	.TRICTL		1		; Assume TRICTL=1
 
@@ -10,8 +10,8 @@
 	.3048MHZ	0		; 30 MHz
 	.IFCLKOE	0		; IFCLK tri-state, CTL0 CTL2 drives the ADC
 
-	D	2			OE0 OE2		; 2 cycle, CTL0 CTL2 low
-	Z	2			CTL0 CTL2 OE0 OE2	; 2 cycle, CTL0 CTL2 high
+	D	2			OE0 OE2			; 2 cycles, CTL0 CTL2 low
+	Z	2			CTL0 CTL2 OE0 OE2	; 2 cycles, CTL0 CTL2 high
 	J	RDY0 AND RDY0 $0 $0	CTL0 CTL2 OE0 OE2	; 1 cycle, CTL0 CTL2 high, jp 0
 
 ; End
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_8.inc b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_8.inc
index c3845d9..9483e35 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_8.inc
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_8.inc
@@ -1,6 +1,7 @@
 #define ifconfig_8 0xca
 
-static const unsigned char waveform_8[ 32 ] = {
+static const unsigned char waveform_8[ 32 ] =
+{
 	0x03,0x02,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_8.wvf b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_8.wvf
index 159778b..99253ca 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_8.wvf
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/gpif_8.wvf
@@ -2,7 +2,7 @@
 ;
 ; Comment header
 ;
-	.WAVEFORM	8		; 8 MS/s
+	.WAVEFORM	8		; 8 MS/s (6 cycles @ 48 MHz)
 
 	.TRICTL		1		; Assume TRICTL=1
 
@@ -10,8 +10,8 @@
 	.3048MHZ	1		; 48 MHz
 	.IFCLKOE	0		; IFCLK tri-state, CTL0 CTL2 drives the ADC
 
-	D	3			OE0 OE2		; 3 cycle, CTL0 CTL2 low
-	Z	2			CTL0 CTL2 OE0 OE2	; 2 cycle, CTL0 CTL2 high
+	D	3			OE0 OE2			; 3 cycles, CTL0 CTL2 low
+	Z	2			CTL0 CTL2 OE0 OE2	; 2 cycles, CTL0 CTL2 high
 	J	RDY0 AND RDY0 $0 $0	CTL0 CTL2 OE0 OE2	; 1 cycle, CTL0 CTL2 high, jp 0
 
 ; End
diff --git a/PyHT6022/Firmware/DSO6022BE/waveforms/waveforms.inc b/PyHT6022/Firmware/DSO6022BE/waveforms/waveforms.inc
index 4f28745..c5819cb 100644
--- a/PyHT6022/Firmware/DSO6022BE/waveforms/waveforms.inc
+++ b/PyHT6022/Firmware/DSO6022BE/waveforms/waveforms.inc
@@ -1,6 +1,7 @@
 #define ifconfig_1 0x8a
 
-static const unsigned char waveform_1[ 32 ] = {
+static const unsigned char waveform_1[ 32 ] =
+{
 	0x0F,0x0E,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
@@ -9,7 +10,8 @@ static const unsigned char waveform_1[ 32 ] = {
 
 #define ifconfig_10 0x8a
 
-static const unsigned char waveform_10[ 32 ] = {
+static const unsigned char waveform_10[ 32 ] =
+{
 	0x01,0x01,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
@@ -18,7 +20,18 @@ static const unsigned char waveform_10[ 32 ] = {
 
 #define ifconfig_102 0x8a
 
-static const unsigned char waveform_102[ 32 ] = {
+static const unsigned char waveform_102[ 32 ] =
+{
+	0xFA,0xFA,0xFA,0xFA,0xFA,0xF9,0x00,0x00,
+	0x02,0x00,0x00,0x00,0x00,0x00,0x01,0x00,
+	0x50,0x55,0x55,0x55,0x55,0x55,0x55,0x00,
+	0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+};
+
+#define ifconfig_103 0xca
+
+static const unsigned char waveform_103[ 32 ] =
+{
 	0xFA,0xFA,0xFA,0xFA,0xFA,0xF9,0x00,0x00,
 	0x02,0x00,0x00,0x00,0x00,0x00,0x01,0x00,
 	0x50,0x55,0x55,0x55,0x55,0x55,0x55,0x00,
@@ -27,7 +40,8 @@ static const unsigned char waveform_102[ 32 ] = {
 
 #define ifconfig_104 0x8a
 
-static const unsigned char waveform_104[ 32 ] = {
+static const unsigned char waveform_104[ 32 ] =
+{
 	0xFA,0xFA,0xF9,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x00,0x01,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x55,0x00,0x00,0x00,0x00,
@@ -36,7 +50,8 @@ static const unsigned char waveform_104[ 32 ] = {
 
 #define ifconfig_105 0x8a
 
-static const unsigned char waveform_105[ 32 ] = {
+static const unsigned char waveform_105[ 32 ] =
+{
 	0xC8,0xC8,0xC7,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x00,0x01,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x55,0x00,0x00,0x00,0x00,
@@ -45,7 +60,8 @@ static const unsigned char waveform_105[ 32 ] = {
 
 #define ifconfig_106 0xca
 
-static const unsigned char waveform_106[ 32 ] = {
+static const unsigned char waveform_106[ 32 ] =
+{
 	0xFA,0xFA,0xF9,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x00,0x01,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x55,0x00,0x00,0x00,0x00,
@@ -54,7 +70,8 @@ static const unsigned char waveform_106[ 32 ] = {
 
 #define ifconfig_110 0x8a
 
-static const unsigned char waveform_110[ 32 ] = {
+static const unsigned char waveform_110[ 32 ] =
+{
 	0x96,0x95,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
@@ -63,7 +80,8 @@ static const unsigned char waveform_110[ 32 ] = {
 
 #define ifconfig_113 0xca
 
-static const unsigned char waveform_113[ 32 ] = {
+static const unsigned char waveform_113[ 32 ] =
+{
 	0xBB,0xBB,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
@@ -72,7 +90,8 @@ static const unsigned char waveform_113[ 32 ] = {
 
 #define ifconfig_12 0xca
 
-static const unsigned char waveform_12[ 32 ] = {
+static const unsigned char waveform_12[ 32 ] =
+{
 	0x02,0x01,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
@@ -81,7 +100,8 @@ static const unsigned char waveform_12[ 32 ] = {
 
 #define ifconfig_120 0x8a
 
-static const unsigned char waveform_120[ 32 ] = {
+static const unsigned char waveform_120[ 32 ] =
+{
 	0x4B,0x4A,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
@@ -90,7 +110,8 @@ static const unsigned char waveform_120[ 32 ] = {
 
 #define ifconfig_140 0x8a
 
-static const unsigned char waveform_140[ 32 ] = {
+static const unsigned char waveform_140[ 32 ] =
+{
 	0x25,0x25,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
@@ -99,7 +120,8 @@ static const unsigned char waveform_140[ 32 ] = {
 
 #define ifconfig_15 0x8a
 
-static const unsigned char waveform_15[ 32 ] = {
+static const unsigned char waveform_15[ 32 ] =
+{
 	0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x01,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x00,0x00,0x00,0x00,0x00,0x00,
@@ -108,7 +130,8 @@ static const unsigned char waveform_15[ 32 ] = {
 
 #define ifconfig_150 0x8a
 
-static const unsigned char waveform_150[ 32 ] = {
+static const unsigned char waveform_150[ 32 ] =
+{
 	0x1E,0x1D,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
@@ -117,16 +140,28 @@ static const unsigned char waveform_150[ 32 ] = {
 
 #define ifconfig_16 0xca
 
-static const unsigned char waveform_16[ 32 ] = {
+static const unsigned char waveform_16[ 32 ] =
+{
 	0x01,0x01,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
 	0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 };
 
+#define ifconfig_164 0x8a
+
+static const unsigned char waveform_164[ 32 ] =
+{
+	0x25,0x25,0x00,0x00,0x00,0x00,0x00,0x00,
+	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
+	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
+	0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+};
+
 #define ifconfig_2 0x8a
 
-static const unsigned char waveform_2[ 32 ] = {
+static const unsigned char waveform_2[ 32 ] =
+{
 	0x07,0x07,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
@@ -135,7 +170,8 @@ static const unsigned char waveform_2[ 32 ] = {
 
 #define ifconfig_24 0xca
 
-static const unsigned char waveform_24[ 32 ] = {
+static const unsigned char waveform_24[ 32 ] =
+{
 	0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x01,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x00,0x00,0x00,0x00,0x00,0x00,
@@ -144,7 +180,8 @@ static const unsigned char waveform_24[ 32 ] = {
 
 #define ifconfig_3 0x8a
 
-static const unsigned char waveform_3[ 32 ] = {
+static const unsigned char waveform_3[ 32 ] =
+{
 	0x05,0x04,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
@@ -153,7 +190,8 @@ static const unsigned char waveform_3[ 32 ] = {
 
 #define ifconfig_30 0xaa
 
-static const unsigned char waveform_30[ 32 ] = {
+static const unsigned char waveform_30[ 32 ] =
+{
 	0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
@@ -162,7 +200,8 @@ static const unsigned char waveform_30[ 32 ] = {
 
 #define ifconfig_4 0xca
 
-static const unsigned char waveform_4[ 32 ] = {
+static const unsigned char waveform_4[ 32 ] =
+{
 	0x06,0x05,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
@@ -171,7 +210,8 @@ static const unsigned char waveform_4[ 32 ] = {
 
 #define ifconfig_48 0xea
 
-static const unsigned char waveform_48[ 32 ] = {
+static const unsigned char waveform_48[ 32 ] =
+{
 	0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
@@ -180,7 +220,8 @@ static const unsigned char waveform_48[ 32 ] = {
 
 #define ifconfig_5 0x8a
 
-static const unsigned char waveform_5[ 32 ] = {
+static const unsigned char waveform_5[ 32 ] =
+{
 	0x03,0x02,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
@@ -189,7 +230,8 @@ static const unsigned char waveform_5[ 32 ] = {
 
 #define ifconfig_6 0x8a
 
-static const unsigned char waveform_6[ 32 ] = {
+static const unsigned char waveform_6[ 32 ] =
+{
 	0x02,0x02,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
@@ -198,7 +240,8 @@ static const unsigned char waveform_6[ 32 ] = {
 
 #define ifconfig_8 0xca
 
-static const unsigned char waveform_8[ 32 ] = {
+static const unsigned char waveform_8[ 32 ] =
+{
 	0x03,0x02,0x00,0x00,0x00,0x00,0x00,0x00,
 	0x02,0x00,0x01,0x00,0x00,0x00,0x00,0x00,
 	0x50,0x55,0x55,0x00,0x00,0x00,0x00,0x00,
diff --git a/PyHT6022/Firmware/DSO6022BL/dso6022bl-firmware.hex b/PyHT6022/Firmware/DSO6022BL/dso6022bl-firmware.hex
index fc022d0..214f939 100644
--- a/PyHT6022/Firmware/DSO6022BL/dso6022bl-firmware.hex
+++ b/PyHT6022/Firmware/DSO6022BL/dso6022bl-firmware.hex
@@ -37,8 +37,8 @@
 :2003A300E625F074012DFAE43CFB8E078A828B838FF01216A890E624F02290E61274D8F01A
 :2003C30090E614E4F090E6D204F08D828C838EF01216A890E621F00DBD00010C8D828C8398
 :2003E3008EF01216A8FF90E62074075FF08D828C838EF01216A8C423541F90E64004F002DB
-:200403000245AF827E00EE75F005A4FCADF02491F582ED341AF583E493FBB5070280080EA9
-:20042300BE17E375820022EC2491FCED341AFD8C828D83A3A3A3A3E49390E601F08C828DF0
+:200403000245AF827E00EE75F005A4FCADF024D1F582ED341AF583E493FBB5070280080E69
+:20042300BE19E375820022EC24D1FCED341AFD8C828D83A3A3A3A3E49390E601F08C828DAE
 :2004430083A3E493FDA3E493FEA3E493FF75AF07759DE4759E007C208C031CEB60168D82E3
 :200463008E838FF01216A8FBA3AD82AE8390E67CEBF080E47F608F061FEE600790E67CE42C
 :20048300F080F375820122E582FF70087B64FCFDFE020517EF249B401D8F4C754D00754E9F
@@ -95,30 +95,32 @@
 :2017B1000F0E000000000000020001000000000050555500000000000000000000000000FE
 :2017D1000101000000000000020001000000000050555500000000000000000000000000F9
 :2017F100FAFAFAFAFAF90000020000000000010050555555555555000000000000000000AC
-:20181100FAFAF9000000000002000001000000005055555500000000000000000000000078
-:20183100C8C8C70000000000020000010000000050555555000000000000000000000000EE
-:20185100FAFAF9000000000002000001000000005055555500000000000000000000000038
-:2018710096950000000000000200010000000000505555000000000000000000000000002F
-:20189100BBBB000000000000020001000000000050555500000000000000000000000000C4
-:2018B100020100000000000002000100000000005055550000000000000000000000000017
-:2018D1004B4A00000000000002000100000000005055550000000000000000000000000065
-:2018F100252500000000000002000100000000005055550000000000000000000000000090
-:2019110001000000000000000201000000000000505500000000000000000000000000000D
-:201931001E1D0000000000000200010000000000505555000000000000000000000000005E
-:20195100010100000000000002000100000000005055550000000000000000000000000077
-:2019710007070000000000000200010000000000505555000000000000000000000000004B
-:2019910001000000000000000201000000000000505500000000000000000000000000008D
-:2019B100050400000000000002000100000000005055550000000000000000000000000010
-:2019D100800000000000000003000000000000000000000000000000000000000000000073
-:2019F1000605000000000000020001000000000050555500000000000000000000000000CE
+:20181100FAFAFAFAFAF900000200000000000100505555555555550000000000000000008B
+:20183100FAFAF9000000000002000001000000005055555500000000000000000000000058
+:20185100C8C8C70000000000020000010000000050555555000000000000000000000000CE
+:20187100FAFAF9000000000002000001000000005055555500000000000000000000000018
+:2018910096950000000000000200010000000000505555000000000000000000000000000F
+:2018B100BBBB000000000000020001000000000050555500000000000000000000000000A4
+:2018D1000201000000000000020001000000000050555500000000000000000000000000F7
+:2018F1004B4A00000000000002000100000000005055550000000000000000000000000045
+:2019110025250000000000000200010000000000505555000000000000000000000000006F
+:201931000100000000000000020100000000000050550000000000000000000000000000ED
+:201951001E1D0000000000000200010000000000505555000000000000000000000000003E
+:20197100010100000000000002000100000000005055550000000000000000000000000057
+:201991002525000000000000020001000000000050555500000000000000000000000000EF
+:2019B10007070000000000000200010000000000505555000000000000000000000000000B
+:2019D10001000000000000000201000000000000505500000000000000000000000000004D
+:2019F1000504000000000000020001000000000050555500000000000000000000000000D0
 :201A1100800000000000000003000000000000000000000000000000000000000000000032
-:201A3100030200000000000002000100000000005055550000000000000000000000000093
-:201A5100020200000000000002000100000000005055550000000000000000000000000074
+:201A310006050000000000000200010000000000505555000000000000000000000000008D
+:201A51008000000000000000030000000000000000000000000000000000000000000000F2
 :201A7100030200000000000002000100000000005055550000000000000000000000000053
-:201A910030111A80EA1ED11980AA18911980CA10511980CA0F1119808A0CB11880CA0AD131
-:201AB10017808A08711A80CA06511A808A05311A808A04F11980CA03B119808A0271198007
-:201AD1008A01B117808A963119808A8CF118808A78D118808A71911880CA6E7118808A6AD5
-:131AF100511880CA693118808A681118808A66F117808A60
+:201A9100020200000000000002000100000000005055550000000000000000000000000034
+:201AB100030200000000000002000100000000005055550000000000000000000000000013
+:201AD10030511A80EA1E111A80AA18D11980CA10711980CA0F3119808A0CD11880CA0AD1D0
+:201AF10017808A08B11A80CA06911A808A05711A808A04311A80CA03F119808A02B1198046
+:201B11008A01B117808AA49119808A965119808A8C1119808A78F118808A71B11880CA6EB8
+:1D1B31009118808A6A711880CA695118808A683118808A67111880CA66F117808ABE
 :203D000012010002FFFFFF40B5042A601002010203010A060002000000400100090289000E
 :203D200001010080FA0904000001FF000000070586020002000904000101FF000100070549
 :203D400082010014010904000201FF00010007058201000C010904000301FF000100070502
@@ -209,7 +211,7 @@
 :2013CD000490E6B3ECF090E6B4EDF02290E6A0E0FF43070190E6A0EFF0227E127F3D90E6B5
 :2013ED00B3EFF090E6B47412F02290E6B3E517F090E6B4E516F02290E6A0E0FF4307019070
 :05140D00E6A0EFF02253
-:200066007900E94400601B7A00901B04780175923CE493F2A308B800020592D9F4DAF27501
+:200066007900E94400601B7A00901B4E780175923CE493F2A308B800020592D9F4DAF275B7
 :0200860092FFE7
 :12141200AA82AB83A2F73392D1F5826002D2F7ACF022DF
 :1B14240020F71130F6138883A88220F509F6A8837583002280FEF280F5F022C7
diff --git a/PyHT6022/LibUsbScope.py b/PyHT6022/LibUsbScope.py
index 001e1fc..c7742bf 100644
--- a/PyHT6022/LibUsbScope.py
+++ b/PyHT6022/LibUsbScope.py
@@ -12,7 +12,7 @@
 from PyHT6022.Firmware import dso6021_firmware,dso6022be_firmware, dso6022bl_firmware, fx2_ihex_to_control_packets
 
 class Oscilloscope(object):
-    FIRMWARE_VERSION = 0x0209
+    FIRMWARE_VERSION = 0x0210
     NO_FIRMWARE_VENDOR_ID = 0x04B4
     FIRMWARE_PRESENT_VENDOR_ID = 0x04B5
     PRODUCT_ID_21 = 0x6021
@@ -67,13 +67,16 @@ class Oscilloscope(object):
 
     SAMPLE_RATES = {
                     102: ( "20 kS/s",  20e3),
+                    103: ( "32 kS/s",  32e3),
                     104: ( "40 kS/s",  40e3),
                     105: ( "50 kS/s",  50e3),
                     106: ( "64 kS/s",  64e3),
                     110: ("100 kS/s", 100e3),
+                    113: ("128 kS/s", 128e3),
                     120: ("200 kS/s", 200e3),
                     140: ("400 kS/s", 400e3),
                     150: ("500 kS/s", 500e3),
+                    164: ("640 kS/s", 640e3),
                       1: (  "1 MS/s",   1e6),
                       2: (  "2 MS/s",   2e6),
                       3: (  "3 MS/s",   3e6),
diff --git a/README.md b/README.md
index 7eae92f..c0a9382 100644
--- a/README.md
+++ b/README.md
@@ -197,19 +197,20 @@ The 256 x downsampling option increases the SNR and effective resolution (8bit -
 and allows very long time recording. The program uses the offset and gain calibration from EEPROM.
 It writes the captured data into stdout or an outfile and calculates DC, AC and RMS of the data.
 
-    usage: capture_6022.py [-h] [-d DOWNSAMPLE] [-o OUTFILE] [-r RATE] [-t TIME]
-                           [-x CH1] [-y CH2]
+    usage: capture_6022.py [-h] [-d [DOWNSAMPLE]] [-g] [-o OUTFILE] [-r RATE] [-t TIME] [-x CH1]
+                        [-y CH2]
 
     optional arguments:
-      -h, --help            show this help message and exit
-      -d DOWNSAMPLE, --downsample DOWNSAMPLE
+    -h, --help            show this help message and exit
+    -d [DOWNSAMPLE], --downsample [DOWNSAMPLE]
                             downsample 256 x DOWNSAMPLE
-      -o OUTFILE, --outfile OUTFILE
+    -g, --german          use comma as decimal separator
+    -o OUTFILE, --outfile OUTFILE
                             write the data into OUTFILE
-      -r RATE, --rate RATE  sample rate in kS/s (20, 50, 64, 100, default: 20)
-      -t TIME, --time TIME  capture time in seconds (default: 1.0)
-      -x CH1, --ch1 CH1     gain of channel 1 (1, 2, 5, 10, default: 1)
-      -y CH2, --ch2 CH2     gain of channel 2 (1, 2, 5, 10, default: 1)
+    -r RATE, --rate RATE  sample rate in kS/s (20, 32, 50, 64, 100, 128, 200, default: 20)
+    -t TIME, --time TIME  capture time in seconds (default: 1.0)
+    -x CH1, --ch1 CH1     gain of channel 1 (1, 2, 5, 10, default: 1)
+    -y CH2, --ch2 CH2     gain of channel 2 (1, 2, 5, 10, default: 1)
 
 
 The program `plot_from_capture_6022.py` takes the captured data (either from stdin
diff --git a/examples/capture_6022.py b/examples/capture_6022.py
index 2e515d2..00e9d89 100755
--- a/examples/capture_6022.py
+++ b/examples/capture_6022.py
@@ -7,12 +7,12 @@
 
 optional arguments:
   -h, --help            show this help message and exit
-  --decimalcomma        use comma as decimal separator
+  -g, --german          use comma as decimal separator
   -d, --downsample DOWNSAMPLE
                         downsample 256 x DOWNSAMPLE
   -o OUTFILE, --outfile OUTFILE
                         write the data into OUTFILE
-  -r RATE, --rate RATE  sample rate in kS/s (20, 50, 64, 100, 128, default: 20)
+  -r RATE, --rate RATE  sample rate in kS/s (20, 32, 50, 64, 100, 128, 200, default: 20)
   -t TIME, --time TIME  capture time in seconds (default: 1.0)
   -x CH1, --ch1 CH1     gain of channel 1 (1, 2, 5, 10, default: 1)
   -y CH2, --ch2 CH2     gain of channel 2 (1, 2, 5, 10, default: 1)
@@ -24,18 +24,31 @@
 import argparse
 import sys
 
+
+valid_sample_rates = ( 20, 32, 50, 64, 100, 128, 200 )
+valid_gains = ( 1, 2, 5, 10 )
+
+rate_help = "sample rate in kS/s ("
+for valid_rate in valid_sample_rates:
+    rate_help +=  str( valid_rate ) + ", "
+rate_help += "default: 20)"
+
 # construct the argument parser and parse the arguments
 ap = argparse.ArgumentParser()
 #ap.add_argument( "-c", "--channels", type = int, default = 2,
 #    help="how many channels to capture, default: 2" )
-ap.add_argument( "--decimalcomma", action = "store_true",
+ap.add_argument( "-d", "--downsample",
+        action = 'store',
+        type = int,
+        default = 0,
+        const = 1,
+        nargs = '?',
+        help= "downsample 256 x DOWNSAMPLE" )
+ap.add_argument( "-g", "--german", action = "store_true",
     help="use comma as decimal separator" )
-ap.add_argument( "-d", "--downsample", type = int, default = 0,
-    help="downsample 256 x DOWNSAMPLE" )
 ap.add_argument( "-o", "--outfile", type = argparse.FileType("w"),
     help="write the data into OUTFILE" )
-ap.add_argument( "-r", "--rate", type = int, default = 20,
-    help="sample rate in kS/s (20, 50, 64, 100, 128, default: 20)" )
+ap.add_argument( "-r", "--rate", type = int, default = 20, help=rate_help )
 ap.add_argument( "-t", "--time", type = float, default = 1,
     help="capture time in seconds (default: 1.0)" )
 ap.add_argument( "-x", "--ch1", type = int, default = 1,
@@ -50,7 +63,7 @@
 ############
 #
 channels     = 2
-decimalcomma = options.decimalcomma
+german = options.german
 downsample   = options.downsample
 sample_rate  = options.rate
 sample_time  = options.time
@@ -58,8 +71,6 @@
 ch2gain      = options.ch2
 outfile      = options.outfile or sys.stdout
 
-valid_sample_rates = ( 20, 50, 64, 100, 128 )
-valid_gains = ( 1, 2, 5, 10 )
 
 argerror = False
 if sample_rate not in valid_sample_rates:
@@ -96,7 +107,11 @@
 scope.set_num_channels( channels )
 
 # calculate and set the sample rate ID from real sample rate value
-sample_id = int( round( 100 + sample_rate / 10e3 ) )
+if sample_rate < 1e6:
+	sample_id = int( round( 100 + sample_rate / 10e3 ) ) # 20k..500k -> 102..150
+else:
+	sample_id = int( round( sample_rate / 1e6 ) ) # 1M -> 1
+
 scope.set_sample_rate( sample_id )
 
 # set the gain for CH1 and CH2
@@ -153,8 +168,8 @@ def pcb( ch1_data, ch2_data ):
             pcb.av1 = pcb.av1 / downsample
             pcb.av2 = pcb.av2 / downsample
             if pcb.timestep < sample_time:
-                line = "{:>10.5f}, {:>10.5f}, {:>10.5f}\n".format( pcb.timestep, pcb.av1, pcb.av2 )
-                if decimalcomma:
+                line = "{:>10.6f}, {:>10.5f}, {:>10.5f}\n".format( pcb.timestep, pcb.av1, pcb.av2 )
+                if german:
                     line=line.replace( ',', ';' ).replace( '.', ',' )
                 outfile.write( line )
             pcb.av1 = pcb.av2 = 0
@@ -162,8 +177,8 @@ def pcb( ch1_data, ch2_data ):
     else: # write out every sample
         for ch1_value, ch2_value in zip( ch1_scaled, ch2_scaled ): # merge CH1 & CH2
             if pcb.timestep < sample_time:
-                line = "{:>10.5f}, {:>10.5f}, {:>10.5f}\n".format( pcb.timestep, ch1_value, ch2_value )
-                if decimalcomma:
+                line = "{:>10.6f}, {:>10.5f}, {:>10.5f}\n".format( pcb.timestep, ch1_value, ch2_value )
+                if german:
                     line=line.replace( ',', ';' ).replace( '.', ',' )
                 outfile.write( line )
             pcb.timestep = pcb.timestep + tick
@@ -211,7 +226,7 @@ def pcb( ch1_data, ch2_data ):
 if downsample: # calculate the effective sample rate
     sample_rate = sample_rate / 256 / downsample
 line = "\rCaptured data for {} second(s) @ {} S/s\n".format( sample_time, sample_rate)
-if decimalcomma:
+if german:
     line=line.replace( ',', ';' ).replace( '.', ',' )
 sys.stderr.write( line )
 
@@ -229,11 +244,11 @@ def pcb( ch1_data, ch2_data ):
 rms2 = math.sqrt( rms2 )
 
 line = "CH1: DC = {:8.4f} V, AC = {:8.4f} V, RMS = {:8.4f} V\n".format( dc1, ac1, rms1 )
-if decimalcomma:
+if german:
     line=line.replace( ',', ';' ).replace( '.', ',' )
 sys.stderr.write( line )
 line = "CH2: DC = {:8.4f} V, AC = {:8.4f} V, RMS = {:8.4f} V\n".format( dc2, ac2, rms2 )
-if decimalcomma:
+if german:
     line=line.replace( ',', ';' ).replace( '.', ',' )
 sys.stderr.write( line )
 
diff --git a/examples/plot_from_capture_6022.py b/examples/plot_from_capture_6022.py
index 3d7b9e5..3f43a9d 100755
--- a/examples/plot_from_capture_6022.py
+++ b/examples/plot_from_capture_6022.py
@@ -9,6 +9,7 @@
 
 import csv
 import matplotlib.pyplot as plt
+import matplotlib.mlab as ml
 import sys
 import argparse
 
@@ -18,8 +19,8 @@
 #    help="how many channels to capture, default: 2" )
 ap.add_argument( "-i", "--infile", type = argparse.FileType("r"),
     help="read the data from INFILE" )
-ap.add_argument( "-c", "--channels", type = int, default = 2,
-    help="show one (CH1) or two (CH1, CH2) channels, default: 2)" )
+ap.add_argument( "-c", "--channel", type = int, default = 0,
+    help="show only CH1 or CH2, default: show both)" )
 ap.add_argument( "-s", '--spectrum',
     dest = 'max_freq',
     const = -1,
@@ -30,6 +31,10 @@
     help = "display the spectrum of the samples, optional up to MAX_FREQ" )
 options = ap.parse_args()
 
+if options.channel not in (0, 1, 2):
+    print( "error, channel must be 1 or 2" )
+    sys.exit()
+
 infile = options.infile or sys.stdin
 
 # Use output of 'capture_6022.py'
@@ -48,10 +53,10 @@
 
 infile.close()
 
-fs = 1 / ( time[1] - time[0] )
-
+# calculate sample frequency
+fs = ( len( time ) - 1 ) / ( time[-1] - time[0] )
 
-if options.channels == 2:
+if options.channel == 0:
 # Stack plots in two rows, one or two columns, sync their time and frequency axes
     if options.max_freq:
         fig, ( (v1, sp1), (v2, sp2) ) = plt.subplots( 2, 2, sharex = 'col' )
@@ -82,24 +87,30 @@
     v2.set(xlabel='Time', ylabel='Voltage (V)' )
     v2.grid( True )
 
-else:
+else: # CH1 or CH2
+    if options.channel == 1:
+        ch = ch1
+        color = 'C1'
+    else:
+        ch = ch2
+        color = 'C0'
 # Plot in one rows, one or two columns
     if options.max_freq:
-        fig, ( v1, sp1 ) = plt.subplots( 1, 2 )
+        fig, ( v, sp ) = plt.subplots( 1, 2 )
         # Channel 1 spectrum
-        sp1.set_title( 'Spectrum 1' )
-        sp1.magnitude_spectrum( ch1, fs, scale = 'dB', color = 'C1' )
+        sp.set_title( 'Spectrum ' + str( options.channel ) )
+        sp.magnitude_spectrum( ch, fs, scale = 'dB', color = color )
         if options.max_freq > 0:
-            sp1.axes.set_xlim( [ 0, options.max_freq ] )
-        sp1.grid( True )
+            sp.axes.set_xlim( [ 0, options.max_freq ] )
+        sp.grid( True )
     else:
-        fig, v1 = plt.subplots( 1 )
+        fig, v = plt.subplots( 1 )
 
-    # Channel 1 data
-    v1.set_title( 'Channel 1' )
-    v1.plot( time, ch1, color = 'C1' )
-    v1.set(xlabel='Time', ylabel='Voltage (V)' )
-    v1.grid( True )
+    # Channel data
+    v.set_title( 'Channel ' + str( options.channel ) )
+    v.plot( time, ch, color = color )
+    v.set(xlabel='Time', ylabel='Voltage (V)' )
+    v.grid( True )
 
 
 fig.tight_layout()
diff --git a/setup.py b/setup.py
index 61e51fd..78f2f7c 100644
--- a/setup.py
+++ b/setup.py
@@ -1,4 +1,4 @@
-__version__ = '2.10'
+__version__ = '2.10.1'
 
 
 from setuptools import setup