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ldst.md

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Quick summary

Instruction General theme Optional special features
ldx    x[i] = memory[i] Load pair
ldy    y[i] = memory[i] Load pair
ldz
ldzi
z[_][i] = memory[i] Load pair, interleaved Z
stx memory[i] =    x[i] Store pair
sty memory[i] =    y[i] Store pair
stz
stzi
memory[i] = z[_][i] Store pair, interleaved Z

Instruction encoding

Bit Width Meaning Notes
10 22 A64 reserved instruction Must be 0x201000 >> 10
5 5 Instruction 0 for ldx
1 for ldy
2 for stx
3 for sty
4 for ldz
5 for stz
6 for ldzi
7 for stzi
0 5 5-bit GPR index See below for the meaning of the 64 bits in the GPR

Operand bitfields

For ldx / ldy / stx / sty:

Bit Width Meaning
63 1 Ignored
62 1 Load / store pair of registers (1) or single register (0)
59 3 Ignored
56 3 X / Y register index
0 56 Pointer

For ldz / stz:

Bit Width Meaning
63 1 Ignored
62 1 Load / store pair of registers (1) or single register (0)
56 6 Z row
0 56 Pointer

For ldzi / stzi:

Bit Width Meaning
62 2 Ignored
57 5 Z row (high 5 bits thereof)
56 1 Right hand half (1) or left hand half (0) of Z register pair
0 56 Pointer

Description

Move 64 bytes of data between memory (does not have to be aligned) and an AMX register, or move 128 bytes of data between memory (must be aligned to 128 bytes) and an adjacent pair of AMX registers.

The ldzi and stzi instructions manipulate half of a pair of Z registers. Viewing the 64 bytes of memory and the 64 bytes of every Z register as vectors of i32 / u32 / f32, the mapping between memory and Z is:

Memory0123456789101112131415
Z00 L2 L4 L6 L8 L10 L12 L14 L0 R2 R4 R6 R8 R10 R12 R14 R
Z11 L3 L5 L7 L9 L11 L13 L15 L1 R3 R5 R7 R9 R11 R13 R15 R

In other words, the even Z register contains the even lanes from memory, and the odd Z register contains the odd lanes from memory. By a happy coincidence, this matches up with the "interleaved pair" lane arrangements of mixed-width mac16 / fma16 / fms16 instructions, and with the "interleaved pair" lane arrangements of other instructions when in a (16, 16, 32) arrangement.

Emulation code

See ldst.c.

A representative sample is:

void emulate_AMX_LDX(amx_state* state, uint64_t operand) {
    ld_common(state->x, operand, 7);
}

void ld_common(amx_reg* regs, uint64_t operand, uint32_t regmask) {
    uint32_t rn = (operand >> 56) & regmask;
    const uint8_t* src = (uint8_t*)((operand << 8) >> 8);
    memcpy(regs + rn, src, 64);
    if (operand & LDST_PAIR) {
        memcpy(regs + ((rn + 1) & regmask), src + 64, 64);
    }
}