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16-ch, 125 MSPS DAC in FMC form factor, with remote analog front end board.
Design files (schematics, PCB layouts, BOMs) can be found at Shuttler/releases.
Shuttler is a medium-speed DAC card targeted for ion trap "dc" electrode applications. Design goals are as follows:
- High dc resolution (~18 bits) for trap electrode bias.
- ~15 MHz analog bandwidth to enable fast ion transport and parametric well modulation. Lower bit depth allowable for higher-bandwidth signals, based on noise/distortion of DAC/amplifiers in this bandwidth - ~14 bits is appropriate.
- Enough channels in single rack-mount unit to run an ion trap with state-of-the-art electrode count (~200 electrodes).
Current design specifications:
- AD9117 DACs (14 bits @ 125 MSPS, <1 LSB DNL)
- Resolution above 14 bits to be accomplished with dithering or sigma-delta modulation
- DACs on HPC FMC mezzanine card
- 16 channels per card
- Differential analog output (+/-5 V differential) via COTS connector with shielded impedance-matched pairs (mini-SAS HD)
- Remote analog front-end (AFE) board converts differential signals on mini-SAS HD cables to single-ended, provides additional gain/filtering as desired
- Provision for digital communication between FMC card and remote AFE on mini-SAS HD cable side channels
Analog front-end board:
- Output voltage range +/-10 V, single-ended
- Maximum -3dB output bandwidth ~50 MHz (use passive RC filter to reduce further)
- Onboard 24-bit ADC (enables periodic calibration of output voltages, communication with FPGA on FMC carrier board via mini-SAS HD side channels)
- Relays to enable amplifier outputs to be disconnected from output connector of AFE board. This enables the DAC/AFE electronics to be disconnected from the ion trap (voltage is maintained by capacitors on the ion trap) so that the DACs can be calibrated when ions are trapped.
