CoreValidation: Adapt path changes for Cortex-M core

ARM-software · Dec 23, 2022 · a4b8c27 · a4b8c27
1 parent c7321a3
commit a4b8c27
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Showing 10 changed files with 4,676 additions and 4,537 deletions.
diff --git a/.github/workflows/caller-corevalidation.yml b/.github/workflows/caller-corevalidation.yml
@@ -6,6 +6,7 @@ on:
     paths:
       - .github/workflows/caller-corevalidation.yml
       - CMSIS/Core/**/*
+      - CMSIS/Core_M/**/*
       - CMSIS/Core_A/**/*
       - CMSIS/CoreValidation/**/*
       - Device/ARM/**/*

diff --git a/.github/workflows/codeql-analysis.yml b/.github/workflows/codeql-analysis.yml
@@ -6,6 +6,7 @@ on:
     branches: [ develop ]
     paths:
       - 'CMSIS/Core/**'
+      - 'CMSIS/Core_M/**'
       - 'CMSIS/Core_A/**'
       - 'CMSIS/CoreValidation/**'
       - 'Device/ARM/**'
@@ -14,6 +15,7 @@ on:
     paths:
       - '.github/workflows/codeql-analysis.yml'
       - 'CMSIS/Core/**'
+      - 'CMSIS/Core_M/**'
       - 'CMSIS/Core_A/**'
       - 'CMSIS/CoreValidation/**'
       - 'Device/ARM/**'

diff --git a/.github/workflows/fileheader.yml b/.github/workflows/fileheader.yml
@@ -5,6 +5,7 @@ on:
     branches: [ develop ]
     paths:
       - 'CMSIS/Core/**'
+      - 'CMSIS/Core_M/**'
       - 'CMSIS/Core_A/**'
       - 'CMSIS/RTOS2/Include/**'
       - 'CMSIS/RTOS2/Source/**'

diff --git a/ARM.CMSIS.pdsc b/ARM.CMSIS.pdsc
@@ -1662,16 +1662,24 @@ and 8-bit Java bytecodes in Jazelle state.
 
   <components>
     <!-- CMSIS-Core component -->
+    <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.0" >
+      <description>CMSIS-CORE for Cortex-A/R/M</description>
+      <files>
+        <!-- CPU independent -->
+        <file category="include" name="CMSIS/Core/"/>
+      </files>
+    </component>
+
     <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.6.0"  condition="ARMv6_7_8-M Device" >
       <description>CMSIS-CORE for Cortex-M, SC000, SC300, Star-MC1, ARMv8-M, ARMv8.1-M</description>
       <files>
         <!-- CPU independent -->
         <file category="doc"     name="CMSIS/Documentation/Core/html/index.html"/>
-        <file category="include" name="CMSIS/Core/Include/"/>
-        <file category="header"  name="CMSIS/Core/Include/tz_context.h" condition="TrustZone"/>
+        <file category="include" name="CMSIS/Core_M/Include/"/>
+        <file category="header"  name="CMSIS/Core_M/Include/tz_context.h" condition="TrustZone"/>
         <!-- Code template -->
-        <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/main_s.c"     version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
-        <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
+        <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core_M/Template/ARMv8-M/main_s.c"     version="1.1.1" select="Secure mode 'main' module for ARMv8-M"/>
+        <file category="sourceC" attr="template" condition="TZ Secure" name="CMSIS/Core_M/Template/ARMv8-M/tz_context.c" version="1.1.1" select="RTOS Context Management (TrustZone for ARMv8-M)" />
       </files>
     </component>
 

diff --git a/CMSIS/CoreValidation/Project/avh.yml b/CMSIS/CoreValidation/Project/avh.yml
@@ -7,6 +7,7 @@ backend:
 upload:
   - ARM.CMSIS.pdsc
   - CMSIS/Core/**/*
+  - CMSIS/Core_M/**/*
   - CMSIS/Core_A/**/*
   - CMSIS/CoreValidation/**/*
   - -:CMSIS/CoreValidation/Project/Core_Validation-*.zip