Merge pull request #2456 from dd-baoshan/cv32e40p/dev

Fix issues that found during regression for corner cases

cv32e40p/env/corev-dv/cv32e40p_debug_rom_gen.sv

@@ -72,6 +72,8 @@ class cv32e40p_debug_rom_gen extends riscv_debug_rom_gen;
             end
             // Need to save off GPRs to avoid modifying program flow
             push_gpr_to_debugger_stack(cfg_corev, debug_main);
+            // workaround to handle issue if debug entry during test_done by preventing load instr uses xreg with print_port value
+            rand_xreg_after_push_gpr_to_debugger_stack(cfg_corev, debug_main);
 
             // Need to save off FPRs incase f-extension instructions are used to avoid modifying program flow
             if(cfg.enable_floating_point && !cfg.enable_fp_in_x_regs) begin

cv32e40p/env/corev-dv/cv32e40p_instr_test_pkg.sv

@@ -140,6 +140,19 @@ package cv32e40p_instr_test_pkg;
     end
   endfunction : push_gpr_to_debugger_stack
 
+  // workaround for issue of debug entry during test_done by preventing load instr uses same xreg that having print_port value
+  // note: this function must be called after push_gpr_to_debugger_stack()
+  function automatic void rand_xreg_after_push_gpr_to_debugger_stack(cv32e40p_instr_gen_config cfg_corev,
+                                                                     ref string instr[$]);
+    int unsigned  total_gpr = 32;
+    for(int i = 1; i < total_gpr; i++) begin
+      logic [3:0] rand_nibble = $urandom_range(0,15);
+      if (i inside {cfg_corev.reserved_regs}) continue;
+      // set the xregs into higher ram space (refer .map file)
+      instr.push_back($sformatf("lui x%0d, 0x003F%1h000 >> 12 # rand_xreg_after_push_gpr_to_debugger_stack ", i, rand_nibble));
+    end
+  endfunction : rand_xreg_after_push_gpr_to_debugger_stack
+
   // Push floating point registers to the debugger stack
   function automatic void push_fpr_to_debugger_stack(cv32e40p_instr_gen_config cfg_corev,
                                                      ref string instr[$],

cv32e40p/env/corev-dv/instr_lib/cv32e40p_float_instr_lib.sv

@@ -393,7 +393,9 @@ class cv32e40p_float_zfinx_base_instr_stream extends cv32e40p_base_instr_stream;
       logic [31:0] i_imm;
       for (int i=1; i<32; i++) begin
         riscv_reg_t i_gpr = riscv_reg_t'(i);
+        // if (i_gpr inside {cfg.reserved_regs}) continue;
         if (i == int'(cfg.sp)) continue; // do not alter stack pointer
+        if (i == int'(cfg.tp)) continue; // do not alter thread pointer
         if (cfg.gen_debug_section) begin
           if (i == int'(cfg_cv32e40p.dp)) continue; // do not alter debug pointer
         end

cv32e40p/env/uvme/cov/uvme_rv32x_hwloop_covg.sv

@@ -951,8 +951,7 @@ class uvme_rv32x_hwloop_covg # (
         if (enter_hwloop_sub) begin 
           enter_hwloop_sub_cnt++;
           if (is_trap && is_dbg_mode && !cv32e40p_rvvi_vif.csr_dcsr_step && enter_hwloop_sub_cnt == 1) begin : TRAP_DUETO_DBG_ENTRY // exception trap and debug are b2b cycles (except debug step)
-            has_pending_trap_due2_dbg = 1; is_trap = 0; 
-            enter_hwloop_sub = 0; enter_hwloop_sub_cnt = 0;
+            has_pending_trap_due2_dbg = 1; 
           end // TRAP_DUETO_DBG_ENTRY
           else if (pc_is_mtvec_addr() && !is_mcause_irq()) begin : EXCEPTION_ENTRY
             for (int i=0; i<HWLOOP_NB; i++) begin
@@ -991,7 +990,13 @@ class uvme_rv32x_hwloop_covg # (
           // [optional] todo: mie has effect on irq during exception. Current hwloop tests do not exercise nested irq with mie enabled
 
           check_exception_exit();
-          if (!(is_ebreak || is_ecall || is_illegal || has_pending_trap_due2_dbg || has_pending_trap_due2_irq)) begin enter_hwloop_sub = 0; enter_hwloop_sub_cnt = 0; end
+          if (!(is_ebreak || is_ecall || is_illegal || has_pending_trap_due2_dbg || has_pending_trap_due2_irq)) begin
+            enter_hwloop_sub = 0; enter_hwloop_sub_cnt = 0; 
+          end
+          else if (has_pending_trap_due2_dbg) begin
+            enter_hwloop_sub = 0; enter_hwloop_sub_cnt = 0;
+            is_ebreak = 0; is_ecall = 0; is_illegal = 0; is_trap = 0;
+          end
           prev_pc_rdata_sub = cv32e40p_rvvi_vif.pc_rdata;
         end
 

cv32e40p/env/uvme/vseq/uvme_cv32e40p_random_debug_vseq.sv

@@ -69,7 +69,7 @@ class uvme_cv32e40p_reduced_rand_debug_req_c extends uvme_cv32e40p_random_debug_
 
     constraint default_dly_c {
         if (num_of_debug_req == 1) dly inside {[200:2000]};
-        else dly inside {[500:10000]};
+        else dly inside {[2500:10000]};
     }
 
     constraint num_dgb_req_c {
@@ -85,12 +85,13 @@ function uvme_cv32e40p_reduced_rand_debug_req_c::new(string name="uvme_cv32e40p_
     super.new(name);
     if ($value$plusargs("num_debug_req=%0d",num_of_debug_req)) begin
         num_of_debug_req.rand_mode(0);
+        num_dgb_req_c.constraint_mode(0);
     end
 endfunction : new
 
 task uvme_cv32e40p_reduced_rand_debug_req_c::rand_delay();
-    if (! std::randomize(dly) with {  dly inside {[1:10000]}; } ) begin
-        `uvm_fatal("RAND_DEBUG_RAND_DELAY", "Cannot randomize dly")
+    if (!std::randomize(dly) with {dly inside {[2500:10000]};}) begin
+        `uvm_fatal("RAND_DEBUG_RAND_DELAY", "Randomization dly Failed")
     end
     #(dly);
 endtask : rand_delay

cv32e40p/tests/programs/corev-dv/corev_rand_fp_instr_debug/test.yaml

@@ -7,6 +7,7 @@ uvm_test: uvmt_$(CV_CORE_LC)_firmware_test_c
 description: >
     Random debug in fp instruction stream
 plusargs: >
-    +gen_random_debug 
-    # +gen_reduced_rand_dbg_req -> produce not many dbg_req
+    +gen_reduced_rand_dbg_req 
+    +num_debug_req=1000 
+    # +gen_reduced_rand_dbg_req -> produce not many dbg_req, use num_debug_req to indicate intended repetitive number
     # +gen_random_debug -> produce many dbg_req