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Oleksij Rempel edited this page Jul 19, 2013 · 3 revisions

AR9271

  • SOC with USB client interface
  • Arch: RISC - Tensilica core (Xtensa?)
  • PCIe host
  • RAM: 256 KB
  • usb intreface based on FUSB200?

TODO images need to be linked from local repo
AR9271 pins

  • 28 - GPIO0/JTAG TMS - test mode select
  • 29 - GPIO1/JTAG TDI - test data input
  • 30 - GPIO2/JTAG TCK - test clock
  • 31 - GPIO4/JTAG TDO - test data output
  • 48 - GPIO9 and UART Rx
  • 49 - GPIO8 and UART Tx (baudrate 19200)

AR7010

  • SOC with USB client interface
  • Arch: RISC - Tensilica core (Xtensa?)
  • PCIe host
  • RAM: 256 KB
  • usb intreface based on FUSB200?

AR7010 pins

  • 22 - JTAG TCK
  • 23 - JTAG TDO
  • 24 - JTAG TDI
  • 25 - JTAG TMS
  • 27 - EJTAG_SEL - To enable jtag just set pin EJTAG_SEL hig
  • 28 - JTAG TRST_L - test reset
  • 30 - USB D+
  • 32 - USB D-
  • 38 - LED/GPIO?
  • 52 - GPIO9 and UART Rx
  • 54 - GPIO8 and UART Tx (baudrate 115200)
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