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Build fixes for RISC-V 32-bit Linux support #76798

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merged 9 commits into from
Sep 19, 2020
Merged

Build fixes for RISC-V 32-bit Linux support #76798

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de0d55c
library/panic_unwind: Add UNWIND_DATA_REG for RISC-V 32-bit
alistair23 Sep 16, 2020
84fe26c
library/std: linux: Add support for RISC-V 32-bit
alistair23 Sep 16, 2020
cd066c9
library/std: raw: Add support for RISC-V 32-bit
alistair23 Sep 16, 2020
cf07535
library/std: sys_common: Add support for RISC-V 32-bit
alistair23 Sep 16, 2020
0f3ccbd
library/unwind: Add support for RISC-V 32-bit
alistair23 Sep 16, 2020
3e94295
tools/build-manifest: Add support for RISC-V 32-bit
alistair23 Sep 16, 2020
fd76268
library/panic_unwind: Consolidate RV32 and RV64
alistair23 Sep 16, 2020
57b2da8
library/unwind: Consolidate RV32 and RV64
alistair23 Sep 16, 2020
3d1b6d6
library/unwind: Add missing )
alistair23 Sep 17, 2020
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2 changes: 1 addition & 1 deletion library/panic_unwind/src/gcc.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -120,7 +120,7 @@ const UNWIND_DATA_REG: (i32, i32) = (24, 25); // I0, I1
#[cfg(target_arch = "hexagon")]
const UNWIND_DATA_REG: (i32, i32) = (0, 1); // R0, R1

#[cfg(target_arch = "riscv64")]
#[cfg(any(target_arch = "riscv64", target_arch = "riscv32"))]
const UNWIND_DATA_REG: (i32, i32) = (10, 11); // x10, x11

// The following code is based on GCC's C and C++ personality routines. For reference, see:
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3 changes: 2 additions & 1 deletion library/std/src/os/linux/raw.rs
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Expand Up @@ -234,7 +234,8 @@ mod arch {
target_arch = "mips64",
target_arch = "s390x",
target_arch = "sparc64",
target_arch = "riscv64"
target_arch = "riscv64",
target_arch = "riscv32"
))]
mod arch {
pub use libc::{blkcnt_t, blksize_t, ino_t, nlink_t, off_t, stat, time_t};
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6 changes: 4 additions & 2 deletions library/std/src/os/raw/mod.rs
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Expand Up @@ -22,7 +22,8 @@ mod tests;
target_arch = "powerpc",
target_arch = "powerpc64",
target_arch = "s390x",
target_arch = "riscv64"
target_arch = "riscv64",
target_arch = "riscv32"
)
),
all(target_os = "android", any(target_arch = "aarch64", target_arch = "arm")),
Expand Down Expand Up @@ -65,7 +66,8 @@ pub type c_char = u8;
target_arch = "powerpc",
target_arch = "powerpc64",
target_arch = "s390x",
target_arch = "riscv64"
target_arch = "riscv64",
target_arch = "riscv32"
)
),
all(target_os = "android", any(target_arch = "aarch64", target_arch = "arm")),
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3 changes: 2 additions & 1 deletion library/std/src/sys_common/alloc.rs
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Expand Up @@ -14,7 +14,8 @@ use crate::ptr;
target_arch = "powerpc64",
target_arch = "asmjs",
target_arch = "wasm32",
target_arch = "hexagon"
target_arch = "hexagon",
target_arch = "riscv32"
)))]
pub const MIN_ALIGN: usize = 8;
#[cfg(all(any(
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2 changes: 1 addition & 1 deletion library/unwind/src/libunwind.rs
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Expand Up @@ -54,7 +54,7 @@ pub const unwinder_private_data_size: usize = 2;
#[cfg(target_arch = "sparc64")]
pub const unwinder_private_data_size: usize = 2;

#[cfg(target_arch = "riscv64")]
#[cfg(any(target_arch = "riscv64", target_arch = "riscv32"))]
pub const unwinder_private_data_size: usize = 2;

#[cfg(target_os = "emscripten")]
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1 change: 1 addition & 0 deletions src/tools/build-manifest/src/main.rs
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Expand Up @@ -110,6 +110,7 @@ static TARGETS: &[&str] = &[
"riscv32i-unknown-none-elf",
"riscv32imc-unknown-none-elf",
"riscv32imac-unknown-none-elf",
"riscv32gc-unknown-linux-gnu",
"riscv64imac-unknown-none-elf",
"riscv64gc-unknown-none-elf",
"riscv64gc-unknown-linux-gnu",
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