*: support split partition table region #12213

crazycs520 · 2019-09-16T14:58:44Z

What problem does this PR solve?

Support split record/index region for the partition table.

Split all table partition record region.

create table t (a int,b int,index idx(a)) partition by hash(a) partitions 5;
mysql>split partition table t between (0) and (4000000) regions 4;
+--------------------+----------------------+
| TOTAL_SPLIT_REGION | SCATTER_FINISH_RATIO |
+--------------------+----------------------+
| 20                 | 1.0                  |                         -- 20 = 4*5
+--------------------+----------------------+

Split specified table partitions record region.

-- split region for partition `p3` and `p4`
mysql>split partition table t partition (p3,p4) between (0) and (1000000) regions 5;
+--------------------+----------------------+
| TOTAL_SPLIT_REGION | SCATTER_FINISH_RATIO |
+--------------------+----------------------+
| 8                  | 1.0                  |                                          
+--------------------+----------------------+

Split all table partition index region.

mysql>split partition table t index idx between (0) and (4000000) regions 4;
+--------------------+----------------------+
| TOTAL_SPLIT_REGION | SCATTER_FINISH_RATIO |
+--------------------+----------------------+
| 20                 | 1.0                  |
+--------------------+----------------------+

Split specified table partitions index region.

mysql>split partition table t partition (p3,p4) index idx between (0) and (1000000) regions 5;
+--------------------+----------------------+
| TOTAL_SPLIT_REGION | SCATTER_FINISH_RATIO |
+--------------------+----------------------+
| 8                  | 1.0                  |
+--------------------+----------------------+

-- partition p0,p1,p2 has 4+4 regions separately,（4 record region, 4 index region.）
-- partition p3,p4 has 8+8 regions separately, ( 8 record regions, 8 index region.)
-- So, total regions of table t is 56 = ((4+4)*3 + (8+8)*2)
mysql>show table t regions;
+-----------+---------------------------------------+---------------------------------------+-----------+-----------------+---------------+------------+---------------+------------+----------------------+------------------+
| REGION_ID | START_KEY                             | END_KEY                               | LEADER_ID | LEADER_STORE_ID | PEERS         | SCATTERING | WRITTEN_BYTES | READ_BYTES | APPROXIMATE_SIZE(MB) | APPROXIMATE_KEYS |
+-----------+---------------------------------------+---------------------------------------+-----------+-----------------+---------------+------------+---------------+------------+----------------------+------------------+
| 542       | t_60_r                                | t_60_r_1000000                        | 545       | 5               | 543, 545, 705 | 0          | 0             | 0          | 1                    | 0                |
| 546       | t_60_r_1000000                        | t_60_r_2000000                        | 629       | 1               | 547, 549, 629 | 0          | 35            | 0          | 1                    | 0                |
| 550       | t_60_r_2000000                        | t_60_r_3000000                        | 634       | 3               | 551, 553, 634 | 0          | 0             | 0          | 1                    | 0                |
| 513       | t_60_r_3000000                        | t_61_                                 | 638       | 1               | 514, 515, 638 | 0          | 0             | 0          | 1                    | 0                |
| 732       | t_60_i_1_                             | t_60_i_1_0380000000000f42400300000000 | 734       | 4               | 734, 735, 797 | 0          | 23            | 0          | 1                    | 0                |
| 736       | t_60_i_1_0380000000000f42400300000000 | t_60_i_1_0380000000001e84800300000000 | 739       | 3               | 738, 739, 801 | 0          | 35            | 0          | 1                    | 0                |
| 740       | t_60_i_1_0380000000001e84800300000000 | t_60_i_1_0380000000002dc6c00300000000 | 742       | 4               | 742, 743, 804 | 0          | 35            | 0          | 1                    | 0                |
| 530       | t_60_i_1_0380000000002dc6c00300000000 | t_60_r                                | 531       | 2               | 531, 532, 611 | 0          | 0             | 0          | 1                    | 0                |
| 562       | t_61_r                                | t_61_r_1000000                        | 563       | 2               | 563, 615, 701 | 0          | 0             | 0          | 1                    | 0                |
| 570       | t_61_r_1000000                        | t_61_r_2000000                        | 623       | 3               | 571, 572, 623 | 0          | 0             | 0          | 1                    | 0                |
| 574       | t_61_r_2000000                        | t_61_r_3000000                        | 575       | 2               | 575, 576, 628 | 0          | 35            | 0          | 1                    | 0                |
| 517       | t_61_r_3000000                        | t_62_                                 | 520       | 5               | 518, 519, 520 | 0          | 35            | 0          | 1                    | 0                |
| 764       | t_61_i_1_                             | t_61_i_1_0380000000000f42400300000000 | 798       | 1               | 766, 767, 798 | 0          | 35            | 0          | 1                    | 0                |
| 772       | t_61_i_1_0380000000000f42400300000000 | t_61_i_1_0380000000001e84800300000000 | 773       | 2               | 773, 774, 775 | 0          | 0             | 0          | 1                    | 0                |
| 776       | t_61_i_1_0380000000001e84800300000000 | t_61_i_1_0380000000002dc6c00300000000 | 778       | 5               | 778, 787, 805 | 0          | 35            | 0          | 1                    | 0                |
| 554       | t_61_i_1_0380000000002dc6c00300000000 | t_61_r                                | 555       | 2               | 555, 557, 612 | 0          | 0             | 0          | 1                    | 0                |
| 538       | t_62_r                                | t_62_r_1000000                        | 539       | 2               | 539, 540, 618 | 0          | 35            | 0          | 1                    | 0                |
| 558       | t_62_r_1000000                        | t_62_r_2000000                        | 559       | 2               | 559, 561, 622 | 0          | 23            | 0          | 1                    | 0                |
| 566       | t_62_r_2000000                        | t_62_r_3000000                        | 640       | 3               | 567, 568, 640 | 0          | 0             | 0          | 1                    | 0                |
| 521       | t_62_r_3000000                        | t_63_                                 | 524       | 5               | 522, 523, 524 | 0          | 35            | 0          | 1                    | 0                |
| 748       | t_62_i_1_                             | t_62_i_1_0380000000000f42400300000000 | 751       | 1               | 749, 751, 800 | 0          | 0             | 0          | 1                    | 0                |
| 752       | t_62_i_1_0380000000000f42400300000000 | t_62_i_1_0380000000001e84800300000000 | 754       | 4               | 753, 754, 755 | 0          | 23            | 0          | 1                    | 0                |
| 756       | t_62_i_1_0380000000001e84800300000000 | t_62_i_1_0380000000002dc6c00300000000 | 758       | 4               | 758, 759, 806 | 0          | 35            | 0          | 1                    | 0                |
| 534       | t_62_i_1_0380000000002dc6c00300000000 | t_62_r                                | 535       | 2               | 535, 536, 613 | 0          | 0             | 0          | 1                    | 0                |
| 642       | t_63_r                                | t_63_r_200000                         | 645       | 5               | 644, 645, 678 | 0          | 0             | 0          | 1                    | 0                |
| 646       | t_63_r_200000                         | t_63_r_400000                         | 648       | 4               | 648, 649, 679 | 0          | 35            | 0          | 1                    | 0                |
| 662       | t_63_r_400000                         | t_63_r_600000                         | 665       | 5               | 664, 665, 680 | 0          | 0             | 0          | 1                    | 0                |
| 666       | t_63_r_600000                         | t_63_r_800000                         | 669       | 5               | 668, 669, 681 | 0          | 0             | 0          | 1                    | 0                |
| 582       | t_63_r_800000                         | t_63_r_1000000                        | 585       | 5               | 583, 585, 697 | 0          | 0             | 0          | 1                    | 0                |
| 586       | t_63_r_1000000                        | t_63_r_2000000                        | 587       | 2               | 587, 588, 630 | 0          | 35            | 0          | 1                    | 0                |
| 590       | t_63_r_2000000                        | t_63_r_3000000                        | 591       | 2               | 591, 593, 636 | 0          | 0             | 0          | 1                    | 0                |
| 525       | t_63_r_3000000                        | t_64_                                 | 528       | 5               | 526, 528, 703 | 0          | 0             | 0          | 1                    | 0                |
| 808       | t_63_i_1_                             | t_63_i_1_038000000000030d400300000000 | 810       | 3               | 810, 811, 840 | 0          | 0             | 0          | 1                    | 0                |
| 812       | t_63_i_1_038000000000030d400300000000 | t_63_i_1_038000000000061a800300000000 | 814       | 3               | 813, 814, 815 | 0          | 0             | 0          | 1                    | 0                |
| 816       | t_63_i_1_038000000000061a800300000000 | t_63_i_1_0380000000000927c00300000000 | 818       | 3               | 818, 819, 843 | 0          | 0             | 0          | 1                    | 0                |
| 820       | t_63_i_1_0380000000000927c00300000000 | t_63_i_1_0380000000000c35000300000000 | 822       | 3               | 821, 822, 823 | 0          | 0             | 0          | 1                    | 0                |
| 716       | t_63_i_1_0380000000000c35000300000000 | t_63_i_1_0380000000000f42400300000000 | 719       | 3               | 717, 719, 792 | 0          | 0             | 0          | 1                    | 0                |
| 720       | t_63_i_1_0380000000000f42400300000000 | t_63_i_1_0380000000001e84800300000000 | 721       | 2               | 721, 722, 723 | 0          | 0             | 0          | 1                    | 0                |
| 724       | t_63_i_1_0380000000001e84800300000000 | t_63_i_1_0380000000002dc6c00300000000 | 727       | 3               | 725, 726, 727 | 0          | 0             | 0          | 1                    | 0                |
| 578       | t_63_i_1_0380000000002dc6c00300000000 | t_63_r                                | 580       | 4               | 579, 580, 620 | 0          | 0             | 0          | 1                    | 0                |
| 650       | t_64_r                                | t_64_r_200000                         | 651       | 2               | 651, 652, 653 | 0          | 0             | 0          | 1                    | 0                |
| 654       | t_64_r_200000                         | t_64_r_400000                         | 657       | 3               | 655, 657, 674 | 0          | 0             | 0          | 1                    | 0                |
| 658       | t_64_r_400000                         | t_64_r_600000                         | 660       | 4               | 660, 661, 676 | 0          | 35            | 0          | 1                    | 0                |
| 670       | t_64_r_600000                         | t_64_r_800000                         | 673       | 3               | 672, 673, 677 | 0          | 0             | 0          | 1                    | 0                |
| 598       | t_64_r_800000                         | t_64_r_1000000                        | 600       | 4               | 600, 624, 692 | 0          | 0             | 0          | 1                    | 0                |
| 602       | t_64_r_1000000                        | t_64_r_2000000                        | 603       | 2               | 603, 633, 699 | 0          | 0             | 0          | 1                    | 0                |
| 606       | t_64_r_2000000                        | t_64_r_3000000                        | 607       | 2               | 607, 608, 635 | 0          | 35            | 0          | 1                    | 0                |
| 6         | t_64_r_3000000                        |                                       | 17        | 5               | 15, 16, 17    | 0          | 208           | 0          | 1                    | 0                |
| 824       | t_64_i_1_                             | t_64_i_1_038000000000030d400300000000 | 825       | 2               | 825, 827, 841 | 0          | 0             | 0          | 1                    | 0                |
| 828       | t_64_i_1_038000000000030d400300000000 | t_64_i_1_038000000000061a800300000000 | 830       | 4               | 829, 830, 831 | 0          | 0             | 0          | 1                    | 0                |
| 832       | t_64_i_1_038000000000061a800300000000 | t_64_i_1_0380000000000927c00300000000 | 833       | 2               | 833, 834, 835 | 0          | 0             | 0          | 1                    | 0                |
| 836       | t_64_i_1_0380000000000927c00300000000 | t_64_i_1_0380000000000c35000300000000 | 837       | 2               | 837, 838, 839 | 0          | 0             | 0          | 1                    | 0                |
| 779       | t_64_i_1_0380000000000c35000300000000 | t_64_i_1_0380000000000f42400300000000 | 782       | 1               | 780, 781, 782 | 0          | 0             | 0          | 1                    | 0                |
| 783       | t_64_i_1_0380000000000f42400300000000 | t_64_i_1_0380000000001e84800300000000 | 786       | 1               | 784, 786, 802 | 0          | 0             | 0          | 1                    | 0                |
| 788       | t_64_i_1_0380000000001e84800300000000 | t_64_i_1_0380000000002dc6c00300000000 | 791       | 1               | 789, 790, 791 | 0          | 23            | 0          | 1                    | 0                |
| 594       | t_64_i_1_0380000000002dc6c00300000000 | t_64_r                                | 595       | 2               | 595, 596, 614 | 0          | 0             | 0          | 1                    | 0                |
+-----------+---------------------------------------+---------------------------------------+-----------+-----------------+---------------+------------+---------------+------------+----------------------+------------------+
56 rows in set

What is changed and how it works?

Check List

Tests

Unit test
Manual test

Code changes

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Side effects

Related changes

Need to cherry-pick to the release branch

Release note

Support split region for partition table.

codecov · 2019-09-26T03:46:33Z

Codecov Report

Merging #12213 into master will not change coverage.
The diff coverage is n/a.

@@            Coverage Diff            @@
##            master    #12213   +/-   ##
=========================================
  Coverage   80.431%   80.431%           
=========================================
  Files          461       461           
  Lines       107180    107180           
=========================================
  Hits         86206     86206           
  Misses       14847     14847           
  Partials      6127      6127

…artition-table-region

executor/executor_test.go

…artition-table-region

bb7133

LGTM

go.mod

…artition-table-region

…zycs520/tidb into split-partition-table-region

zimulala · 2019-10-14T05:14:12Z

executor/executor_test.go

+	// Test split region for partition table.
+	tk.MustExec("drop table if exists t")
+	tk.MustExec("create table t (a int,b int) partition by hash(a) partitions 5;")
+	tk.MustExec("split table t between (0) and (1000000) regions 5;")


Do we need to check the result like line 4141?

crazycs520 · 2019-10-14T06:16:54Z

/run-all-tests

zimulala

LGTM

sre-bot · 2019-10-14T06:32:34Z

/run-all-tests

sre-bot · 2019-10-14T06:36:03Z

@crazycs520 merge failed.

crazycs520 · 2019-10-14T06:46:44Z

/run-all-tests

crazycs520 · 2019-10-14T07:33:51Z

/run-unit_test

sre-bot · 2019-10-14T07:43:11Z

cherry pick to release-3.1 failed

sre-bot · 2019-10-14T07:46:32Z

cherry pick to release-3.0 failed

crazycs520 added 2 commits September 16, 2019 21:00

*: support split partition table record region

5b2be9c

*: support split partition table index region

235fdaf

crazycs520 added type/new-feature type/usability labels Sep 16, 2019

make tidy

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sre-bot mentioned this pull request Sep 17, 2019

ddl: fix drop index failed when index contain auto_increment column and more than 2 index contain auto_increment_column #12230

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crazycs520 closed this Sep 17, 2019

crazycs520 reopened this Sep 26, 2019

crazycs520 added 2 commits September 26, 2019 11:58

Merge branch 'master' of https://github.com/pingcap/tidb into split-p…

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…artition-table-region

refine code

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sre-bot mentioned this pull request Sep 30, 2019

ddl: make ddl test more stable #12503

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fmt code

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bb7133 reviewed Oct 9, 2019

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crazycs520 added 2 commits October 10, 2019 15:07

address comment

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Merge branch 'master' of https://github.com/pingcap/tidb into split-p…

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…artition-table-region

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bb7133 added needs-cherry-pick-3.0 status/LGT1 Indicates that a PR has LGTM 1. labels Oct 10, 2019

sre-bot mentioned this pull request Oct 10, 2019

table: avoid write untouched index in auto commit and avoid get untouched index key from tikv #12609

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Merge branch 'master' into split-partition-table-region

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crazycs520 added 3 commits October 12, 2019 15:13

Merge branch 'master' of https://github.com/pingcap/tidb into split-p…

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…artition-table-region

update parser go.mod

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Merge branch 'split-partition-table-region' of https://github.com/cra…

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…zycs520/tidb into split-partition-table-region

zimulala reviewed Oct 14, 2019

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crazycs520 added 3 commits October 14, 2019 14:08

address comment to refine test

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address comment to refine test

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Merge branch 'master' into split-partition-table-region

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zimulala added status/LGT2 Indicates that a PR has LGTM 2. status/can-merge Indicates a PR has been approved by a committer. and removed status/LGT1 Indicates that a PR has LGTM 1. labels Oct 14, 2019

zimulala and others added 2 commits October 14, 2019 14:30

Merge branch 'master' into split-partition-table-region

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Merge branch 'master' into split-partition-table-region

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Merge branch 'master' into split-partition-table-region

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crazycs520 merged commit 99a4e60 into pingcap:master Oct 14, 2019

crazycs520 added a commit to crazycs520/tidb that referenced this pull request Dec 5, 2019

*: support split partition table region (pingcap#12213)

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crazycs520 mentioned this pull request Dec 5, 2019

*: support split partition table region (#12213) #13929

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zimulala pushed a commit that referenced this pull request Dec 5, 2019

*: support split partition table region (#12213) (#13929)

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XiaTianliang pushed a commit to XiaTianliang/tidb that referenced this pull request Dec 21, 2019

*: support split partition table region (pingcap#12213)

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crazycs520 mentioned this pull request Apr 17, 2020

sql: update docs for split partition table pingcap/docs-cn#2810

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sre-bot mentioned this pull request Apr 20, 2020

sql: update docs for split partition table (#2810) pingcap/docs-cn#2837

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*: support split partition table region #12213

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*: support split partition table region #12213

*: support split partition table region #12213

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