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1. super-engine super-engine Public

2. RISC-V-single-cycle-core-Logisim RISC-V-single-cycle-core-Logisim Public

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   RV32I signle cycle simulation on an open source software Logisim

3. Uart Uart Public

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4. common_peripheral_ips common_peripheral_ips Public

   Forked from merledu/common_peripheral_ips

   This repository contains generic peripheral IPs. These IPs can be used as memory mapped device with various bus interfaces like, Tilelink, AXI, AXI-Lite and APB.

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5. verification_training verification_training Public

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6. Rev-Soc Rev-Soc Public

   Forked from merledu/Rev-Soc

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